s to reduce static power consumption have been
developed in the research
environment. The Way Adaptable D-Nuca
cache represents the results of o

ur activity on applying such
techniques to large wire delay dominated

L2 caches. In a Way
Adaptable D-Nuca cache by exploiting typical featu

res of
D-NUCA design we dynamically activate or deactivate entire
wa

ys on the basis of the application working set thus adapting
the size o

f the powered-on portion of L2 cache to the needs of
the running applica

tions. This imply a reduction of L2 cache
static power consumption with

negligible performance
degradation .and also some other little but perha

ps surprising
effects.

Speaker Bio:
Pierfrancesco Foglia i

s an Assistant Professor at the
Information Engineering Department of th

e University of Pisa.
His research interest lies in Computer Architectur

e including
Coherence Protocols Cache memories and Operating Systemeffects. His other research interests include Computer Networks
and Co