Speaker/Affiliation

: John E. Savage/Brown University

Date/Time: Friday January 15 2

008 11:00 a.m.

Location: ACES 2.402

Host: Chandrajit Bajaj

Talk Title: Computing with Stochastically Assembled Nanoscale Devi

ces

Talk Abstract:
Advances have been been made recently in ass

embling nanoscale devices
using non-photolithographic means. This import

ant development which
offers the potential for greatly increasing the

density of memory cells and
logic gates introduces a new model of comp

utation and new analytical
challenges. In this talk we provide an intro

duction to this new area.

The difficulty of assembling irregularly p

laced nanoscale devices has
caused the research community to focus on r

egular arrays of such
devices and in particular the crossbar. All kno

wn methods for controlling
individual nanowires (NWs)in a crossbar by me

soscale wires (MWs)
introduces randomness in the connections. This intr

oduces several
questions. First which methods of controlling NWs with

MWs devotes
the smallest amount of area for this purpose? Second how c

an stochastically
assembled chips be configured after assembly? Third s

ince errors will occur
during assembly how can chips be designed to min

imize the effect of such
errors? Finally what computational limitations
do stochastically assembled
crossbar-based computers introduce? We wil

l address these and other
questions.

Speaker Bio:
John Savage

is Professor of Computer Science at Brown University. He
earned his PhD

in Electrical Engineering at MIT in 1965 and his bachelor''s
and Master

''s degrees also at MIT in 1962. He was employed by Bell
Laboratories

from 1965 until 1967 when he joined the faculty at Brown
University. He

is a founder of the Department of Computer Science and
was its chair fr

om 1985 to 1991.

Savage''s early research was in information theory
and communication
theory. His work on the complexity of decoders for e

rror correcting codes
in the 1960s led him into theoretical computer sc

ience and to the introduction
of circuit complexity into the field. His

first book The Complexity of Computing
published in 1976 became the s

tandard reference on circuits. He has also
contributed to research on sp

ace-time tradeoffs area-time tradeoffs in VLSI
I/O time-space tradeoff

s silicon compilers and parallel algorithms for VLSI
and the finite-el

ement method. His current research focus is computational
nanotechnology

. He is a Fellow of AAAS and ACM a Life Fellow of IEEE and
a Guggenhei