UTCS FACULTY CANDIDATE: Martha Mercaldi Kim/University of Washington Reining in Fabrication Costs with Brick and Mortar Chips ACES 2.302 Tuesday March 18 2008 11:00 a.m.

Contact Name: 
Jenna Whitney
Date: 
Mar 18, 2008 11:00am - 12:00pm

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://www.cs.utexas.edu/department/webevent/utcs/events/cgi/eidupdate.cgi
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br>Type of Talk: UTCS Faculty Candidate

Speaker/Affiliation: Marth

a Mercaldi Kim/University of Washington

Date/Time: Tuesday March 1

8 2008 11:00 a.m.

Location: ACES 2.302

Host: Steve Keckle

r

Talk Title: Reining in Fabrication Costs with Brick and Mortar Chi

ps

Talk Abstract:
Over the years Moore''s Law has provided expone

ntial growth in
the raw computational resources available to hardware a

rchitects.
At the same time however chip fabrication costs have also

skyrocketed resulting in expenses that relatively few institutions can afford. As part of my dissertation I have proposed brick and
mo

rtar chips to mitigate these high fabrication costs while offering
the
performance and integration of a modern ASIC. This work
includes seve

ral architectural design choices and innovations
including a polymorph

ic on-chip network design. I will demonstrate
multiple modes of netwo

rk customization that this design allows
including topology and buffer

ing resources. This single polymorphic
network fabric can be configure

d to mimic the topology and perform-
ance of optimally designed applicat

ion-specific networks with no
appreciable overhead. This network is no

t only a critical enabler of
brick and mortar-based designs but has br

oad applicability to any
chip requiring an on-chip network. When used

with brick and mortar
however low-cost high-performance custom chip

s can become a
reality.