br>
Talk Abstract:
The architecture of a software system is the highe

st level of
abstraction at which useful analysis of system properties i

s
possible. Performance analysis at this level can be useful for
as

sessing whether a proposed architecture can meet the
desired performanc

e specifications and can help in making
key architectural decisions. Ar

chitecture based performance
analysis can also be extremely useful for

existing systems for
capacity planning as well as for determining how t

he system will
scale up. In this paper we propose an approach for perfo

rmance
evaluation of software systems from their architecture descripti

on.
Our approach initially models the system as a Discrete Time
Mar

kov Chain and extracts parameters for constructing a closed
Product Fo

rm Queuing Network model that is solved using the
SHARPE software packa

ge. Our approach predicts the throughput
and the average response time

of the system under varying work-
loads. If the performance is not satis

factory our approach performs
a series of bottleneck analyses to sugge

st how capacity of the
hardware resources or performance of the softwar

e components
should be improved to meet the given performance targets.

We also
discuss the experimental validation of our model and a related
issue
of allocating software components on hardware for improving perf

ormance.

Speaker Bio:
Pankaj Jalote/Professor

Ph.D. Unive

rsity of Illinois at Urbana-Champaign (1985)
M.S. Pennsylvania State Un

iversity Park (1982)
B.Tech Indian Institute of Technology Kanpur (1980

)

Pankaj Jalote has recently joined Department of Computer Science <

br>and Engineering at I.I.T. Delhi as Microsoft Chair Professor. Before
this he was with the Department of Computer Science and Engineering
at
IIT Kanpur since 1989 where he was also the Head of the Depart-
ment f

rom 1998 to 2002. Earlier he was an Assistant Professor in the
Departmen

t of Computer Science at the University of Maryland where
he also held
joint appointment in the Institute of Advanced Computer
Studies. From

1996 to 1998 he was Vice President (quality) at Infosys
Technologies Lt

d. a large Bangalore-based company providing software
solutions worldwi

de where he spearheaded Infosys'' successful move to
high maturity lev

els of the CMM. From 2003 to 2004 he was a Visiting
Researcher at Micros

oft Corporation Redmond USA.

He is the author of CMM in Practice
(Addison Wesley 1999) a book
that has been translated in Japanese C

hinese and Korean; Software
Project Management in Practice (Addison W

esley Feb 2002); the highly
popular textbook An Integrated Approach t

o Software Engineering
(Springer 1991 2nd Edition 1996 3rd Edition 2

005) whose Indian edition
was recognized as the best selling book in c

omputer science by its local
publisher; and the graduate-level book Fau

lt Tolerance in Distributed
Systems (Prentice Hall 1994). He is on

the Board of Advisors of many
software companies in India and USA is a
Technical Advisory Board
member for Microsoft Research India and is

on the Editorial Board of
IEEE Transactions on Software Engineering an

d International Journal of
Emperical Software Engineering.

His re

search interest is in software engineering (software quality software
p

rocess improvement software architecture analysis) and fault tolerant
systems and reliability.