UTCS Colloquium/Architecture: Satish Narayanasamy/ University of Michigan: "A Case Against Unbridled Parallelism," ACES 2.402, Satish Narayanasamy/ University of Michigan

Contact Name: 
Jenna Whitney
Date: 
Oct 26, 2009 3:30pm - 5:00pm

There is a sign-up schedule for this talk that can be found

at http://www.cs.utexas.edu/department/webevent/utcs/events/cgi/list_events

.cgi

Type of Talk: UTCS Colloquium/Architecture

Speaker

/ Affiliation: Satish Narayanasamy/ University of Michigan

Date/Ti

me: Monday, October 26, 2009/ 3:30 p.m. until 5:00 p.m.

Location

: ACES 2.402

Host: Emmett Witchel

Talk Title: "A Case Agai

nst Unbridled Parallelism"

Talk Abstract:

The fundamental prob

lem with shared-memory multi-threaded programming model is that it exposes

an unbounded number of thread interleavings to the parallel runtime system.
Current testing methods focus on stress testing, which try to expose as m

any different thread interleavings as possible. But, it remains impractica

l for programmers to test and ensure the correctness of all possible thread
interleavings.

I will first argue that instead of investing more a

nd more effort on stress testing, we should develop runtime mechanisms tha

t would constrain the thread interleaving during a production run to avoid

untested interleavings, which I will show could reduce the chance of trigg

ering a concurrency bug significantly. I will discuss techniques for encodi

ng tested interleavings in a program''s binary, and hardware support for e

fficiently enforcing those constraints in production runs.

I will a

lso talk about deterministic replay, which could help programmers understa

nd and debug a multi-threaded program execution by allowing them to reprodu

ce the thread interleaving seen during an execution. Prior software techniq

ues incur more than 10x runtime performance overhead, but I will discuss a
speculative recording technique that enabled us to build a software record

-and-replay system that incurs only about 30-50% overhead.

Speaker

Bio:

Satish Narayanasamy is an Assistant Professor in the EECS Departm

ent at the University of Michigan. He has a Ph.D. in Computer Science from

the University of California, San Diego. His research interests include co

mputer architecture, hardware mechanisms and software tools for programmin

g many-cores, and system reliability. He has received two IEEE Top Picks a

wards.