Ashay Rane
 
Graduate Research Assistant
Department of Computer Science
The University of Texas at Austin
GDC 5.518E
Campus Mail Code: D9500
2317 Speedway, Austin, TX
first . last at utexas . edu


Publications: (most recent first)

  • Ashay Rane, James Browne, "Enhancing performance optimization of multicore chips and multichip nodes with data structure metrics", Parallel Architectures and Compilation Techniques (PACT) 2012 - Nominated as one of the three best papers of the conference
     
  • Ashay Rane, James Browne, Lars Koesterke, "A Systematic Process for Efficient Execution on Intel's Heterogeneous Computation Nodes", Extreme Science and Discovery Environment (XSEDE) 2012
     
  • Ashay Rane, James Browne, Lars Koesterke, "PerfExpert and MACPO: Which code segments should (not) be ported to MIC?", TACC-Intel High Performance Computing Symposium 2012
     
  • Ashay Rane, Saurabh Sardeshpande, James Browne, "Determining Code Segments that can Benefit from Execution on GPUs", Supercomputing Conference (SC) 2011
     
  • Ashay Rane, James Browne, "Performance Optimization of Data Structures using Memory Access Characterization", IEEE Cluster Conference 2011
     
  • Olalekan Sopeju, Martin Burtscher, Ashay Rane, James Browne, "AutoSCOPE: Automatic Suggestions for Code Optimizations Using PerfExpert", International Conference on Parallel and Distributed Processing Techniques and Applications 2011
     
  • Ashay Rane, Dan Stanzione, "Experiences in tuning performance of hybrid MPI/OpenMP applications on quad-core systems", Linux Clusters Institute 2009