Ashay Rane
 
Graduate Research Assistant
Department of Computer Science
The University of Texas at Austin
GDC 5.518E
Campus Mail Code: D9500
2317 Speedway, Austin, TX
first . last at utexas . edu


Contact information

GDC 5.518E
2317 Speedway, Stop D9500, Austin, TX 78712-1757

Objective

To continuously seek higher levels of knowledge in compilers and computer architecture through academic study, research and interaction with people and to use this knowledge in building practical applications.

Recent Publications

  • Ashay Rane, James Browne, "Enhancing performance optimization of multicore chips and multichip nodes with data structure metrics", Parallel Architectures and Compilation Techniques (PACT) 2012 - Nominated as one of the three best papers of the conference
     
  • Ashay Rane, James Browne, Lars Koesterke, "A Systematic Process for Efficient Execution on Intel's Heterogeneous Computation Nodes", Extreme Science and Discovery Environment (XSEDE) 2012
     
  • Ashay Rane, James Browne, Lars Koesterke, "PerfExpert and MACPO: Which code segments should (not) be ported to MIC?", TACC-Intel High Performance Computing Symposium 2012
     
  • Ashay Rane, James Browne, "Determining Code Segments that can Benefit from Execution on GPUs", Supercomputing Conference (SC) 2011
     
  • Ashay Rane, James Browne, "Performance Optimization of Data Structures using Memory Access Characterization", IEEE Cluster Conference 2011
     
  • Olalekan Sopeju, Martin Burtscher, Ashay Rane, James Browne, "AutoSCOPE: Automatic Suggestions for Code Optimizations Using PerfExpert", International Conference on Parallel and Distributed Processing Techniques and Applications 2011
     

Professional Service

  • Reviewer for 2011 and 2012 International Summer School on HPC Challenges in Computational Sciences

Relevant Work Experience

Graduate Research AssistantSep '12 - May '13, Sep '13 onwards
Research AssociateDec '10 - Aug '12
Texas Advanced Computing Center, Austin, TX
  • Research, develop and maintain PerfExpert and related performance tuning tools
  • Performance analysis, prediction and optimization of applications for Intel Xeon Phi (MIC) architecture
InternMay '13 - Aug '13
Google, Mountain View, CA
Performance EngineerFeb '10 - Nov '10
Salesforce.com, San Francisco, CA
  • Performance monitoring and tuning of Apex and VisualForce implementations (Java)
  • Designing and writing tools for automation of performance monitoring
Graduate Research AssistantJan '08 - May '08, Aug '08 - Dec '09
High Performance Computing Initiative, Arizona State University, Tempe, AZ
  • Hybrid or Mixed Mode programming using MPI and OpenMP
  • Learnt skills related to use of tools such as TAU, numactl, Performance API (PAPI) and Jumpshot
  • Designed preliminary content for and assisted in conducting training workshops on MPI and OpenMP
Research InternMay '08 - Aug '08
SAP Research, Palo Alto, CA
  • Designed and developed debugger for custom thread library
  • Optimized thread library for performance

Other Experiences

Executive Committee MemberMar '13 onwards
Graduate Representative Association of Computer Sciences (GRACS), CS Dept., UT-Austin
  • Organize monthly events (faculty / industry talks) for graduate students in the Computer Science department
Secretary and VolunteerMar '11 - Apr '13
Austin chapter of the Association for India's Development, Austin, TX
  • Responsible for glitch-free operation of the chapter, planned meetings and agendas
  • Actively assisted in organizing a fund-raising concert featuring flutist Pt. Hariprasad Chaurasia
  • Planned, organized and moderated a discussion on Affirmative Action (reservations) in the Indian context
  • Presented our partner organization (Utthan) and the efforts of the Narmada Bachao Andolan in a UT-Austin course titled “Introduction to India”

Short talks and courses

  • Joint PerfExpert/HPCToolkit tutorial, TACC, Austin, TX, May 2012
  • PerfExpert tutorial at Principles and Practice of Parallel Programming, New Orleans, LA, Feb 2012
  • Talk on PerfExpert at the Oak Ridge National Lab, University of Tennessee at Knoxville, Oct 2011
  • PerfExpert tutorial at IEEE Cluster 2011, Sept 2011
  • PerfExpert talk at Arizona State University, Sept 2011
  • PerfExpert tutorial at the TACC Summer Supercomputing Institute, Aug 2011

Education

  • PhD student, Department of Computer Science, The University of Texas at Austin
    August 2012 onwards
     
  • Master of Science, Department of Computer Science, Arizona State University
    Graduated in December 2009, GPA: 4.0
    Thesis: A Study of the Hybrid Programming Paradigm on Multicore Architectures
     
  • Bachelor of Engineering, Department of Computer Engineering, University of Mumbai
    Graduated in July 2006, Aggregate: 72.43%