Behnam Robatmili, PHD

      Qualcomm Bay Area Research and Development (BARD),
      Email: beroy@cs.utexas.edu or robatmili@qualcomm.com

      Curriculum vitae

Developments in mobile platforms in the form of smart phone ecosystems provide interesting research opportunities while posing challenges. Scaling power and performance in this devices is possible by efficient use of heterogeneous components available on these systems. Achieving this goal requires a revision of different system layers including application, programming languages, compilers, virtual machines, runtime system and hardware.
My research agenda is to study different levels of system stack in computer systems (especially mobile platforms) and find methods to improve their efficiency at different levels and across levels. These methods range from better implementing the interaction between levels to vertically integrating some components in different levels where needed and possible.
I work as a research engineer in Qualcomm Bay Area Research & Development (BARD) where we explore new hardware and software research directions for mobile devices. This research focuses on programming language runtimes, new web browser architectures, and virtual machine technologies.


MY PHD WORK

During my PhD, to alleviate some of the power scaling issues of the future processing systems, I designed a high-performance, power-efficient and adaptive multicore processor that targets these future challenges in CMOS technology scaling by relying on (1) low-power, small processing cores that can be merged to run a single thread, and (2) leverage hardware components and compiler support to maximize performance and energy saving across distributed cores. To achieve maximum power efficiency, I studied the roots of inefficiencies in previous distributed uniprocessors and reinvented a variety of distributed fetch, operand deliver, branch prediction, and criticality enhancements for instructions within a single thread distributed across small cores. These components form the basis for a third-generation EDGE microarchitecture called T3. This dynamic multicore processor can operate very efficiently in different power and performance domains. In these projects, I also used different machine learning and criticality analysis for automating the design and optimization process. My work is also being incorporated into the E2 Dynamic Multicore System project at Microsoft Research.

EDUCATION

University of Texas at Austin
PhD in Computer Science, (2005- present)

Thesis: "Efficient Execution of Sequential Applications on Multicore Systems" [PPT]
Advisor: Prof. Doug Burger, Co-advisor: Prof. Kathryn S. McKinley 

University of Tehran
M.S. in Computer Engineering, (2001- Feb 2004)

Thesis: "Design and Simulation of an SMT Network Processor"

Advisor: Prof. Nasser Yazdani, Co-advisor: Prof. Mehrdad Nourani
 

University of Tehran
B.S. in Computer  Engineering, June 2001
Bachelor Project: "Elaboration Process in Object Oriented HDL Intermediate Formats"
 


HONORS

J. C. Browne Outstanding Graduate Student Fellowship at Computer Sciences (2010)
University of Texas at Austin, typically awarded to one or two students per year.
ASPLOS Best Paper Award (2009)
First Rank among the 2004 graduation class, Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
Certificate of Recognition for excellent contribution to coaching and organizing 2002 ACM ICPC (International Collegiate Programming Contest)
University of Tehran Teams for International and National Competition from Software engineering group, ECE, University of Tehran
9th rank in the 2000 National MS Computer Engineering Entrance Exam, Iran

CONFERECE AND JOURNAL PUBLICATIONS

Efficient Execution of Sequential Applications on Multicore Systems [PPT]
Behnam Robatmili, PhD Thesis, UT Austin, Aug 2011
Exploiting Criticality to Reduce Bottlenecks in Distributed Uniprocessors (HPCA 2011) [PPT]
Behnam Robatmili, Sibi Govindan, Doug Burger and Stephen W. Keckler
(acceptance rate: 42/227 = 18%)
Evolving Compiler Heuristics to Manage Communication and Contention (AAAI 2010 Nectar Track)
Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili , Bertrand A. Maher, Doug Burger and Kathryn S. McKinley
An Evaluation of the TRIPS Computer System (ASPLOS 2009) -- Best paper award
Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeff Diamond, Paul V. Gratz, Mario Marino, Nitya Ranganathan,
Behnam Robatmili , Aaron Smith, James Burrill, Stephen W. Keckler, Doug Burger and Kathryn S. McKinley
(acceptance rate: 29/113 = 25%)
Strategies for Mapping Dataflow Blocks to Distributed Hardware (MICRO 2008) [PPT]
Behnam Robatmili , Katherine Coons, Doug Burger and Kathryn McKinley
(acceptance rate: 40/210 = 19%)
Feature Selection and Policy Optimization using Reinforcement Learning for Distributed Instruction Placement (PACT 2008)
Katherine Coons, Behnam Robatmili , Matthew Taylor, Bert Maher, Doug Burger and Kathryn McKinley
(acceptance rate: 29/159 = 18%)
High Performance Dense Linear Algebra on Spatially Partitioned Processors (PPOPP 2008)
Jeffrey Diamond, Behnam Robatmili , Stephen W. Keckler, Kazushige Goto, Doug Burger and Robert van de Geijn
(acceptance rate: 25/102 = 24%)
Thread-Sensitive Instruction Issue for SMT Processors (IEEE Computer Architecture Letters, Volume 3, Aug. 2004)
Behnam Robatmili , Nasser Yazdani, Somayeh Sardashti and Mehrdad Nourani
Optimizing SMT Processors for Packet Processing (Microprocessors and Microsystems, Volume 29, Sep. 2005)
Behnam Robatmili , Nasser Yazdani and Mehrdad Nourani
NPSMT: A Simulation Environment for SMT Packet Processors (PDCS 2004)
Behnam Robatmili , Nassar Yazdani and Mehrdad Nourani
HASIL: Hardware Assisted Software-based IP Lookup for Large Routing Tables (ICON 2003)
Hossein Mohammadi, Nasser Yazdani, Behnam Robatmili and Mehrdad Nourani

WORKSHOP PUBLICATIONS

Hybrid Operand Communication for Dataflow Processors (PESPMA 2009)
Dong Li, Behnam Robatmili and Doug Burger
Register Bank Assignment for Spatially Partitioned Processors (LCPC 2008)
Behnam Robatmili , Katherine Coons, Doug Burger and Kathryn McKinley
Balancing Local and Global Parallelism for Single-Thread Applications in a Composable Multi-core System (PESPMA 2008)
Behnam Robatmili , Katherine Coons and Doug Burger
Search Optimization for Spatial Path Planning (NIPS 2007)
Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili, Doug Burger, and Kathryn S. McKinley
Software Infrastructure and Tools for the TRIPS Prototype (MOBS 2007)
Bill Yoder, Jim Burrill, Robert McDonald, Kevin B. Bush, Katherine Coons, Mark Gebhart, Sibi Govindan, Bertrand Maher,
Ramadas Nagarajan, Behnam Robatmili, Karthikeyan Sankaralingam, Sadia Sharif and Aaron Smith

TECHNICAL REPORTS

Scaling Power and Performance via Processor Composability (UT Austin TR-10-14, 2010)
Madhu Saravana Sibi, Behnam Robatmili , Hadi Esmaeilzadeh, Bertrand Maher, Dong Li, Aaron Smith, Stephen W. Keckler and Doug Burger
Compiler-assisted Hybrid Operand Communication (UT Austin TR-09-33, 2009)
Dong Li, Behnam Robatmili, Madhu Saravana Sibi Govindan, Aaron Smith, Steve Keckler, Doug Burger


WORK EXPERIENCE

Senior Research Engineer at Qualcomm Bay Area Research & Development (BARD) , Fall 2011-present
Explorig new hardware and software research directions for mobile devices.
This research focuses on programming language runtimes, new web browser architectures, and virtual machine technologies.
Internship at Microsoft Research (MSR),
Designing and implementing several components of the E2 Dynamic Multicore system including branch and predicated prediction and
distributed control protocols and components needed for core-level and cross-core composition support.
With this components, the processor run multiple speculative blocks on each core across all cores composed to run each thread, Spring 2011
Internship at Advance Micro Devises (AMD), Research and Developement Labs (RADL)
Implementing memory interface infrastructure,
Designing and evaluating several prefetching methods for future modern AMD processors, Summer and Fall 2009

RESEARCH PROJECTS AND GROUPS

Bay Area Research & Development Center - Qualcomm
Microsoft Research E2 Dynamic Multicore Project
Advance Micro Devises (AMD) Research and Developement Labs (RADL)
The TRIPS Project
Scale Compiler
Computer Architecture and Technology Laboratory (CART)
Programming Languages Lunch

TEACHING

Teaching assistant for Sets, Logic and Functions (CS313K)
Computer Science Department, University of Texas at Austin, Spring 2009
Teaching assistant for Sets, Logic and Functions (CS313K)
Computer Science Department, University of Texas at Austin, Spring 2008
Teaching assistant for Computer Architecture (CS352)
Computer Science Department, University of Texas at Austin, Fall 2005, Spring 2007

Teaching Undergraduate Compiler Course
University of Tehran ECE Department, Fall 2004.

Teaching assistant for Compiler course for 6 semesters (2000-2003)
University of Tehran ECE Department in University of Tehran.