Department
of Computer Science, University
of Texas at Austin, PHD
Student
RESEARCH INTERESTS
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Extracting the Implicit Parallelism in Single Thread Applications in core-composable TFLEX Layout (probable thesis project) Oct 2007 - Present, One way to increase parallelism on a program is to distribute its execution across multiple cores. However, to achieve a good result, you still need yo keep data locality in high degrees. Balancing these two opposing goal is a challenge for future processors. The purpose of this project is automating the selection of overal topology for mapping a given program to a grid of cores. This involves some analyses in the compiler including memory allocation and register allocation; and some extra support from the hardware including migration of data to the core in which that data is used more frequently.
The Highest Performing Program on TRIPS, Mar 2007 - Aug 2007, Extending the well known algorithm for multiplcation by Goto to a systolic-like algorithm running on a 2-D TRIPS ALU grid. The resulting implementation yields the first demonstration of high-performance in an application executing on the TRIPS processor hardware, a next-generation distributed processor core. This algorithm outperforms the implementation Goto's hand tuned code on all of then other general purpose processors so far!
Register Bank Allocation for Specially Partitioned Processors, Mar 2006 - Sep 2007, Designing and implementing a register allocator for spatially partitioned architectures (i.e. TRIPS and TFLEX). The allocator performs bank assignment together with register allocation. The allocator minimizes spill code and optimizes bank selection based on a priority function. The priority function considers the critical path through the program, delays from registers to consuming instructions, and other resource constraints imposed by the hardware.
Policy Search Optimization for Spatial Path Planning, Apr 2007 - Nov 2007, Improving the instruction scheduling for the TRIPS instruction using a Reinforment Learning method called NEAT.
TRIPS Resource Management System (TRM), Sep 2006 - Sep 2007, A server that supports multiple users connected to multiple TRIPS boards. TRM performs resource allocation, access control. program execution. generating profiling, etc.
University of Texas at Austin
PhD in Computer Science, (2005- present)Advisor: Dr. Doug Burger
University of Tehran
M.S. in Computer Engineering, (2001- Feb 2004)Thesis: "Design and Simulation of an SMT Network Processor"
GPA: 19.19/20
Advisor: Dr. Nasser Yazdani
Consultant: Dr. Mehrdad Nourani
University of Tehran
B.S. in Computer Engineering, June 2001
Bachelor Project: "Elaboration Process in Object Oriented HDL Intermediate Formats"
Jeffrey Diamond, Behnam Robatmili , Stephen W. Keckler, Kazushige Goto, Doug Burger and Robert van de Geijn, "High Performance Dense Linear Algebra on Spatially Partitioned Processors", to apear in the Symposium on Principles and Practice of Parallel Programming (PPOPP), Feb 2008.
Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili, Doug Burger, and Kathryn S. McKinley. Policy, "Search Optimization for Spatial Path Planning", In NIPS-07 workshop on Machine Learning for Systems Problems, December 2007. (Two page extended abstract.).
Bill Yoder, Jim Burrill, Robert McDonald, Kevin B. Bush, Katherine Coons, Mark Gebhart, Sibi Govindan, Bertrand Maher, Ramadas Nagarajan, Behnam Robatmili, Karthikeyan Sankaralingam, Sadia Sharif, Aaron Smith, "Software Infrastructure and Tools for the TRIPS Prototype", Third Annual Workshop on Modeling, Benchmarking and Simulation, MOBS 2007.
Behnam Robatmili , Nasser Yazdani, Somayeh Sardashti, Mehrdad Nourani, "Thread-Sensitive Instruction Issue for SMT Processors", IEEE Computer Architecture Letters, Volume 3, Aug. 2004.
Behnam Robatmili , Nasser Yazdani, Mehrdad Nourani, "Optimizing SMT Processors for Packet Processing", Microprocessors and Microsystems, Volume 29, Issue 7, 1 September 2005, Pages 337-349 .
Behnam Robatmili , Nassar Yazdani, Mehrdad Nourani, "NPSMT: A Simulation Environment for SMT Packet Processors", to ISCA 17th International Conference on Parallel and Distributed Computing Systems (PDCS-2004), San Francisco.
Hossein Mohammadi, Behnam Robatmili , Nasser Yazdani and Mehrdad Nourani, "HASIL: Hardware Assisted Software-based IP Lookup for Large Routing Tables", Proc. of 11th IEEE International Conference on Networking (ICON'2003), Sydney, Australia, pp 99-105, Sep. 2003.
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Teaching assistant in Computer Architecture Course, CS department University of Texas at Austin, Fall 2005 |
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Teaching Undergraduate Compiler Course in University of Tehran ECE Department, Fall 2004. |
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Teaching assistant in Compiler course for 6 semesters (2000-2003) at University of Tehran ECE Department in University of Tehran. |