CART Academic Seminar Courses
CS395T: Readings in Historical Computer Architecture (Burger, Spring 2000)
My goal for this course is to learn about many of the important
historical machines and ideas by reading classic, seminal
papers. Understanding what has gone before is essential for
understanding the evolution of our fast-changing field. An added bonus
is that we extend our bag of design tricks.
CS395T: Embedded Architectures and Applications (Keckler, Fall 1999)
In this course, students will examine the architectures and
applications of embedded microprocessor based systems. A subset of
the topics include digital signal processing, mobile consumer
electronic devices, real-time applications, reliability, and power
management. This is primarily a reading course in which students will
present and discuss papers during class meetings.
For more details on this course, please visit the course home
CS395T: Applications for Billion-Transistor Architectures (Burger, Spring 1999)
In this research seminar, led by Prof. Doug Burger, students will
explore the interaction between key emerging
applications and architectural trends. Students will learn about
cutting-edge architectures, they will gain a broad view of
the emerging application space, and they will study one
application each in depth, each characterizing how their
application is likely to interact with emerging
architectures. For more details on this course, please visit the
course home page.
CS395T: Technology Driven Computer Architecture (Keckler, Fall 1998).
An examination of computer architectures for billion transistor
chips from the perspective of technological capabilities and
constraints. Readings focus both on momentous technological
breakthroughs and their implications, including high density
solid-state memory, interconnection networks, and notable milestones
of integration measured in transistors per chip. The topics of
discussion include VLSI scaling, integrated DRAM and processors, on
and off-chip communication bandwidth, power consumption, tradeoffs
between hardware and software, and novel techniques for using billions
of transistors on a single chip.