Computer Architecture Topics
( an extensive list of topics related to computer architecture )
The following list of computer architecture topics is intended to be an exhaustive list of possible topics for the undergraduate architecture sequence. I am defining computer architecture topics to include all the classic layers of computer architecture: architecture/organization/implementation AND any other topic related to the hardware-software interface, without including all of programming languages and operating systems.
The topics I list below are currently just verbatim sections of each of the following curriculum reports. Thus, the added value of this page is in my pruning of curriculum topics not related to my broad definition of computer architecture.
Excerpt from Computing Curriculum 1991: The 9 subject areas (I have bolded the areas that relate to computer architecture curricula.)
Algorithms and Data Structures This area deals with specific classes of problems and their efficient solutions. The performance characteristics of algorithms and the organization of data relative to different access requirements are major components.
Architecture Methods of organizing efficient, reliable computing systems provide a central focus of this area. It includes implementation of processors, memory, communications, and software interfaces, as well as the design and control of large computational systems that are reliable.
Artificial Intelligence and Robotics The basic models of behavior and the building of (virtual or actual) machines to simulate animal and human behavior are included here. Inference, deduction, pattern recognition, and knowledge representation are major components.
Database and Information Retrieval The area is concerned with the organization of information and algorithms for the efficient access and update of stored information. The modeling of data relationships, security and protection of information in a shared environment, and the characteristics of external storage devices are included in this area.
Human-Computer Communication The efficient transfer of information between humans and machines is the central focus of this area. Graphics, human factors that affect efficient interaction, and the organization and display of information for effective utilization by humans are included.
Numerical and Symbolic Computation General methods for efficiently and accurately using computers to solve equations from mathematical models are central to this area. The effectiveness and efficiency of various approaches to the solution of equations, and the development of high-quality mathematical software packages are important components.
Operating Systems This area deals with control mechanisms that allow multiple resources to be efficiently coordinated during the execution of programs. Included are appropriate services of user requests, effective strategies for resource control, and effective organization to support distributed computation.
Programming Languages The fundamental questions addressed by this area involve notations for defining virtual machines that execute algorithms, the efficient translation from high-level languages to machine codes, and the various extension mechanisms that can be provided in programming languages.
Software Methodology and Engineering The major focus of this area is the specification, design, and production of large software systems that are safe, secure, reliable, and dependable are of special interest.ARCHITECTURE TOPICS (called knowledge units) as defined in the Computing Curricula 1991 - NOTE: I have included not only topics that are officially in the "architecture" section, but I have also included hardware-software interface topics from other topic sections.
AR: Architecture (approximately 59 lecture hours)
AR1: Digital Logic AR2: Digital Systems AR3: Machine Level Representation of Data AR4: Assembly Level Machine Organization AR5: Memory System Organization and Architecture AR6: Interfacing and Communication AR7: Alternative Architectures
OS: Operating Systems (approximately 31 lecture hours)
OS1: History, Evolution, and Philosophy OS2: Tasking and Processes OS3: Process Coordination and Synchronization OS4: Scheduling and Dispatch OS5: Physical and Virtual Memory Organizations OS6: Device Management OS7: File Systems and Naming OS8: Security and Protection OS9: Communications and Networking OS10: Distributed and Real-time Systems
PL: Programming Languages (approximately 46 lecture hours)
PL1: History and Overview of Programming Languages PL2: Virtual Machines PL3: Representation of Data Types PL4: Sequence Control PL5: Data Control, Sharing, and Type Checking PL6: Run-time Storage Management PL7: Finite State Automata and Regular Expressions PL8: Context-Free Grammars and Pushdown Automata PL9: Language Translation Systems PL10: Programming Language Semantics PL11: Programming Paradigms PL12: Distributed and Parallel Programming Constructs
Topics ("knowledge units") from the 9 subject areas of the Computing Curricula 1991 that I believe could be included in an "architecture curriculum":
UNIVERSITY OF TEXAS current architecture curriculum mapped to the above "knowledge unit topics" from the common requirements.
Architecture topics derived from the Liberal Arts Curriculum, produced in 1994. (Note: this curriculum is for programs that have a limit on the number of CS courses they can offer (8-9) and thus have 3 rudimentary courses (CS1, CS2, CS3), three intermediate courses (CO1, CO2, CO3) with 2-3 electives and a senior project.
CS 3: Computer Organization and Architecture
While students in CS 2 work with high-level abstractions such as objects, functions, and abstract data types, there is also the need to expose students at an early stage to lower level abstractions such as digital logic, machine language, computer architecture, data representation, and elements of distributed systems. CS 3 provides this perspective as it covers the following topics:
-- introduction to digital logic and/or microcode -- conventional Von Neumann architectures -- the internal representation of information -- instruction formats and addressing, instruction sets, machine and assembly language programming -- the fetch/execute model of computation -- alternative architectures: RISC/CISC, SIMD/MIMD parallel -- memory architectures and algorithms: cache, virtual memory, paging, segmentation -- I/O architectures: interrupts, memory-mapped I/O -- overview of distributed systems, multiprocessors, networks, massively parallel systems
Overall, CS 3 provides low-level hardware and system models which complement the high-level abstractions discussed in CS 2.
CO1: Sequential and Parallel Algorithms
... use some drawn from computer architecture and systems, e.g. deadlock and process synchronization...
CO3: Programming Languages and Systems
.... including connections with problem-solving paradigms, language design, implementation, and capabilities for parallelism.... significantly less time needs to be spent in this new course on the teaching of language paradigms than in previous language courses; correspondingly, much more time should be available to address issues of design and implementation.
Excerpt from Computing Curricula 1991 on the Architecture Subject area:
There are approximately 59 hours of lectures recommended for this set of knowledge units.
The knowledge units in the common requirements for the subject area of Architecture emphasize the following topics: digital logic, digital systems, machine level representation of data, assembly level machine organization, memory system organization and architecture, interfacing and communication, and alternative architectures.
AR1: Digital Logic
The idea of simple building blocks implemented in different technologies; different levels of integration. Physical considerations such as delays, fan-in, fan-out. The use of a Medium Scale Integrated (MSI) device (Programmable Logic Device, or PLD) to implement complex functions in a single chip. Common flipflop types. Representation and tables. Clocked operation and ripple-through effects, MSI Devices, and their use in making many of the basic logic functions. Interconnection of large units.
Recurring Concepts: complexity of large problems, conceptual and formal models, consistency and completeness, levels of abstraction, ordering in space, ordering in time, reuse, trade-offs and consequences.
Lecture Topics: (12 hours minimum)
1. Basic logic elements and switching theory; minimization and implementation of functions 2. Propagation delays and hazards 3. Technologies; types of flipflop 4. Devices (e.g., demultiplexers, multiplexers, decoders, encoders, adders, subtractors, comparators, shift registers, counters, PLD-type devices) 5. Memories (e.g., ROM, PROM, EPROM, EAROM, RAM) 6. Analysis and synthesis of synchronous circuits, asynchronous vs. Synchronous circuits
Suggested Laboratories: (closed) Design simple logic circuits and implement them with SSI, e.g., parity generation and checking and code conversions, Other design exercises should include the use of multiplexers to perform complex logic on a single chip, and the use of adders and 2ís complement addition and subtraction. PLD-type devices can be designed using individual flipflops and registers. Both serial and parallel data transfer should be included. Students learn how logic functions are implemented in combinational and sequential circuits. Comparison of implementations show reliability, e.g., hazard-free operation and trade-offs should be seen.
Related to: PL7 Prerequisites: Discrete Mathematics Requisite for: AR2
AR2: Digital Systems
The transfer of information from one storage device to another and the means of controlling data flow. The electronic functions of tristate devices, the bus structures and data control concepts. Various ways for describing designs.
Recurring Concepts: complexity of large problems, consistency and completeness, levels of abstraction, ordering in time, reuse, trade-offs and consequences.
Lecture Topics: (six hours minimum)
1. Register transfer notation, conditional and unconditional 2. Algorithmic state machines, steering networks, load transfer signals 3. Tristates and bus structures 4. Iteration, top down/bottom up, divide and conquer 5. Decomposition, trade-offs, economics 6. Block diagrams, timing diagrams, transfer language
Suggested Laboratories: (closed) These exercises show data transfer in algorithmic state machines. Students use tristates, including timing diagrams, to route data. Design is stressed, so that students develop a proper attitude toward design for reliability.
Related to: SE4 Prerequisites: AR1, SE1 Requisite for: AR4, AR5
AR3: Machine Level Representation of Data
Basic machine representations of numeric and non-numeric data.
Recurring Concepts: binding, consistency and completeness, reuse.
Lecture Topics: (three hours minimum)
1. Numeric data representation; e.g., binary, octal, hexadecimal, fixed point, 1ís and 2ís complement, signed, floating point, decimal, BCD, XS3 2. Non-numeric data; e.g., alphanumeric, ASCII, ISO
Related to: NU1, PL3 Prerequisites: Requisite for: AR4, SE4
AR4: Assembly Level Machine Organization
Comparisons of different types of instruction sets and corresponding addressing modes. Emphasis on the relationships among instruction sets, fetch and execute operations, and the underlying architecture. Introduction to the concept of interrupts, as well as the purpose and specifications of a control unit with respect to logic operations. Hardwired and microprogrammed control units, their respective advantages and disadvantages. Vertical and horizontal microcoding. General methods for designing for maintenance, such as breaking up the design for easy maintenance and adding extra hardware for easier access to special registers.
Recurring Concepts: binding, consistency and completeness, ordering in space, ordering in time, trade-offs and consequences.
Lecture Topics: (15 hours minimum)
1. Basic organization; von Neumann, block diagram, data paths, control path, functional units (e.g., ALU, memory, registers), instruction cycle 2. Instruction sets and types 3. Assembly/machine language 4. Addressing modes (e.g., direct, indirect, register, displacement, indexing) 5. Control unit; instruction fetch and execution, operand fetch 6. I/O and interrupts 7. Hardwired realization 8. Microprogrammed realization; formats and coding
Suggested Laboratories: (closed) Exercises include programming at the assembly language level, detecting errors, and using a debugger. Ideally, students should have access to an independent laboratory, in order to minimize interference with other activities. Some of this work can be done with simulators. Students should appreciate the challenge of producing efficient and correct code, as well as observe the relationship between assembly/machine level languages and the architecture.
Related to: OS6, PL2 Prerequisites: AR2, AR3 Requisite for: OS1, PL9
AR5: Memory System Organization and Architecture
Consideration of the physical implementation of large memory systems, together with the techniques of data storage and checking. Overall concepts of virtual memory, cache memory, and the consequences of multiprocessor/multicache architectures. Detailed discussion of the DMA process, as well as techniques for fault handling and factors affecting reliability.
Recurring Concepts: binding, consistency and completeness, efficiency, reuse, trade-offs and consequences.
Lecture Topics: (13 hours minimum)
1. Storage systems and technology 2. Coding, data compression, data integrity 3. Space allocation, hierarchy 4. Main memory organization, bus operations, cycle times for selection and addressing 5. Cache memory, read/write 6. Virtual memory 7. Bussing systems, control, DMA 8. Fault handling, reliability
Related to: OS5, OS6, OS7, OS10, PL2 Prerequisites: AR2 Requisite for: AR6, AR7
AR6: Interfacing and Communication
Input/output control and how it is achieved. Techniques for interrupt handling.
Recurring Concepts: binding, consistency and completeness, ordering in time, trade-offs and consequences.
Lecture Topics: (five hours minimum)
1. Input/output control methods, interrupts 2. Interrupt acknowledgment 3. Synchronization, open loop, handshaking 4. External storage, physical organization and drives
Suggested Laboratories: (closed) Experiments on standalone equipment can be devised to demonstrate synchronization and handshaking protocols. Students will gain a better understanding of synchronization and the interrupt process.
Related to: HU1, OS3, OS6, OS10 Prerequisites: AR5 Requisite for: OS9
AR7: Alternative Architectures
Comparison of stack , array, vector, multiprocessor, hypercube, RISC, and CISC machines. Introduction to the general topic of parallel architectures.
Recurring Concepts: complexity of large problems conceptual and formal models, consistency and completeness, efficiency, evolution, ordering in time, security, trade-offs and consequences.
Lecture Topics (five hours minimum)
1. Comparisons 2. CISC, RISC 3. Parallel architectures (e.g., VLIW, SISD, MISD, SIMD, MIMD) 4. Tight coupling
Related to: AL9, OS3, OS10, PL12 Prerequisites: AR5 Requisite for: