UT PCSPIM Quick Reference to MIPS Instruction Set

This Web page was created by reformatting portions of the LaTeX source file of the public domain documentation distributed with the SPIM simulator. This documentation is fairly consistent with the information in our online manual but it is not identical.

Chris Edmondson-Yurkanan (with thanks to John Conery at the University of Oregon)
Last update: 29 Oct 98 16:18:29

Arithmetic and Logical Instructions

In all instructions below, Src2 can either be a register or an immediate value (a 16 bit integer). The immediate forms of the instructions are only included for reference. The assembler will translate the more general form of an instruction (e.g., add) into the immediate form (e.g., addi) if the second argument is constant.

abs Rdest, RsrcAbsolute Value
Put the absolute value of the integer from register Rsrc in register Rdest.
add Rdest, Rsrc1, Src2Addition (with overflow)
addi Rdest, Rsrc1, ImmAddition Immediate (with overflow)
addu Rdest, Rsrc1, Src2Addition (without overflow)
addiu Rdest, Rsrc1, ImmAddition Immediate (without overflow)
and Rdest, Rsrc1, Src2AND
andi Rdest, Rsrc1, ImmAND Immediate
div Rsrc1, Rsrc2Divide (with overflow)
divu Rsrc1, Rsrc2Divide (without overflow)
Divide the contents of the two registers. Leave the quotient in register lo and the remainder in register hi. Note that if an operand is negative, the remainder is unspecified by the MIPS architecture and depends on the conventions of the machine on which SPIM is run.
div Rdest, Rsrc1, Src2Divide (with overflow)
divu Rdest, Rsrc1, Src2Divide (without overflow)
Put the quotient of the integers from register Rsrc1 and Src2 into register Rdest.
mul Rdest, Rsrc1, Src2Multiply (without overflow)
mulo Rdest, Rsrc1, Src2Multiply (with overflow)
mulou Rdest, Rsrc1, Src2Unsigned Multiply (with overflow)
Put the product of the integers from register Rsrc1 and Src2 into register Rdest.
mult Rsrc1, Rsrc2Multiply
multu Rsrc1, Rsrc2Unsigned Multiply
Multiply the contents of the two registers. Leave the low-order word of the product in register lo and the high-word in register hi.
neg Rdest, RsrcNegate Value (with overflow)
negu Rdest, RsrcNegate Value (without overflow)
Put the negative of the integer from register Rsrc into register Rdest.
nor Rdest, Rsrc1, Src2NOR
not Rdest, RsrcNOT
Put the bitwise logical negation of the integer from register Rsrc into register Rdest.
or Rdest, Rsrc1, Src2OR
ori Rdest, Rsrc1, ImmOR Immediate
rem Rdest, Rsrc1, Src2Remainder
remu Rdest, Rsrc1, Src2Unsigned Remainder
Put the remainder from dividing the integer in register Rsrc1 by the integer in Src2 into register Rdest. Note that if an operand is negative, the remainder is unspecified by the MIPS architecture and depends on the conventions of the machine on which SPIM is run.
rol Rdest, Rsrc1, Src2Rotate Left
ror Rdest, Rsrc1, Src2Rotate Right
Rotate the contents of register Rsrc1 left (right) by the distance indicated by Src2 and put the result in register Rdest.
sll Rdest, Rsrc1, Src2Shift Left Logical
sllv Rdest, Rsrc1, Rsrc2Shift Left Logical Variable
sra Rdest, Rsrc1, Src2Shift Right Arithmetic
srav Rdest, Rsrc1, Rsrc2Shift Right Arithmetic Variable
srl Rdest, Rsrc1, Src2Shift Right Logical
srlv Rdest, Rsrc1, Rsrc2Shift Right Logical Variable
Shift the contents of register Rsrc1 left (right) by the distance indicated by Src2 (Rsrc2) and put the result in register Rdest.
sub Rdest, Rsrc1, Src2Subtract (with overflow)
subu Rdest, Rsrc1, Src2Subtract (without overflow)
Put the difference of the integers from register Rsrc1 and Src2 into register Rdest.
xor Rdest, Rsrc1, Src2XOR
xori Rdest, Rsrc1, ImmXOR Immediate

Constant-Manipulating Instructions

li Rdest, immLoad Immediate
Move the immediate imm into register Rdest.
lui Rdest, immLoad Upper Immediate
Load the lower halfword of the immediate imm into the upper halfword of register Rdest. The lower bits of the register are set to 0.

Comparison Instructions

In all instructions below, Src2 can either be a register or an immediate value (a 16 bit integer).

seq Rdest, Rsrc1, Src2Set Equal
Set register Rdest to 1 if register Rsrc1 equals Src2 and to be 0 otherwise.
sge Rdest, Rsrc1, Src2Set Greater Than Equal
sgeu Rdest, Rsrc1, Src2Set Greater Than Equal Unsigned
Set register Rdest to 1 if register Rsrc1 is greater than or equal to Src2 and to 0 otherwise.
sgt Rdest, Rsrc1, Src2Set Greater Than
sgtu Rdest, Rsrc1, Src2Set Greater Than Unsigned
sle Rdest, Rsrc1, Src2Set Less Than Equal
sleu Rdest, Rsrc1, Src2Set Less Than Equal Unsigned
Set register Rdest to 1 if register Rsrc1 is less than or equal to Src2 and to 0 otherwise.
slt Rdest, Rsrc1, Src2Set Less Than
slti Rdest, Rsrc1, ImmSet Less Than Immediate
sltu Rdest, Rsrc1, Src2Set Less Than Unsigned
sltiu Rdest, Rsrc1, ImmSet Less Than Unsigned Immediate
Set register Rdest to 1 if register Rsrc1 is less than Src2 (or Imm) and to 0 otherwise.
sne Rdest, Rsrc1, Src2Set Not Equal

Branch and Jump Instructions

In all instructions below, Src2 can either be a register or an immediate value (integer). Branch instructions use the PC relative addressing mode, hence have a signed 16-bit offset field; hence they can jump 2^15-1 instructions (not bytes) forward or 2^15 instructions backwards. The jump/jump and link instructions contain a 26 bit address field (a variant of the memory direct addressing mode).

b labelBranch instruction
bczt labelBranch Coprocessor z True
bczf labelBranch Coprocessor z False
Conditionally branch to the instruction at the label if coprocessor z's condition flag is true (false).
beq Rsrc1, Src2, labelBranch on Equal
beqz Rsrc, labelBranch on Equal Zero
bge Rsrc1, Src2, labelBranch on Greater Than Equal
bgeu Rsrc1, Src2, labelBranch on GTE Unsigned
bgez Rsrc, labelBranch on Greater Than Equal Zero
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than or equal to 0.
bgezal Rsrc, labelBranch on Greater Than Equal Zero And Link
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than or equal to 0. Save the address of the next instruction in register 31.
bgt Rsrc1, Src2, labelBranch on Greater Than
bgtu Rsrc1, Src2, labelBranch on Greater Than Unsigned
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are greater than Src2.
bgtz Rsrc, labelBranch on Greater Than Zero
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than 0.
ble Rsrc1, Src2, labelBranch on Less Than Equal
bleu Rsrc1, Src2, labelBranch on LTE Unsigned
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are less than or equal to Src2.
blez Rsrc, labelBranch on Less Than Equal Zero
Conditionally branch to the instruction at the label if the contents of Rsrc are less than or equal to 0.
blt Rsrc1, Src2, labelBranch on Less Than
bltu Rsrc1, Src2, labelBranch on Less Than Unsigned
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are less than Src2.
bltz Rsrc, labelBranch on Less Than Zero
Conditionally branch to the instruction at the label if the contents of Rsrc are less than 0.
bltzal Rsrc, labelBranch on Less Than And Link
Conditionally branch to the instruction at the label if the contents of Rsrc are less than 0. Save the address of the next instruction in register 31.
bne Rsrc1, Src2, labelBranch on Not Equal
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are not equal to Src2.
bnez Rsrc, labelBranch on Not Equal Zero
Conditionally branch to the instruction at the label if the contents of Rsrc are not equal to 0.
j labelJump
Unconditionally jump to the instruction at the label.
jal labelJump and Link
jalr RsrcJump and Link Register
Unconditionally jump to the instruction at the label or whose address is in register Rsrc. Save the address of the next instruction in register 31.
jr RsrcJump Register
Unconditionally jump to the instruction whose address is in register Rsrc.

Load Instructions

la Rdest, addressLoad Address
Load computed address, not the contents of the location, into register Rdest.
lb Rdest, addressLoad Byte
lbu Rdest, addressLoad Unsigned Byte
Load the byte at address into register Rdest. The byte is sign-extended by the lb, but not the lbu, instruction.
lh Rdest, addressLoad Halfword
lhu Rdest, addressLoad Unsigned Halfword
Load the 16-bit quantity (halfword) at address into register Rdest. The halfword is sign-extended by the lh, but not the lhu, instruction
lw Rdest, addressLoad Word
Load the 32-bit quantity (word) at address into register Rdest.
lwcz CPdest, addressLoad Word Coprocessor z
Load the word at address into register CPdest of coprocessor z (0-3).

Store Instructions

sb Rsrc, addressStore Byte
Store the low byte from register Rsrc at address.
sh Rsrc, addressStore Halfword
Store the low halfword from register Rsrc at address.
sw Rsrc, addressStore Word
S tore the word from register Rsrc at address.
swcz CPsrc, addressStore Word Coprocessor z
Store the word from register CPsrc of coprocessor z at address.

Data Movement Instructions (between Registers)

move Rdest, RsrcMove
Move the contents of Rsrc to Rdest.

The multiply and divide unit produces its result in two additional registers, hi and lo. These instructions move values to and from these registers. The multiply, divide, and remainder instructions described above are pseudoinstructions that make it appear as if this unit operates on the general registers and detect error conditions such as divide by zero or overflow.

mfhi RdestMove From hi
mflo RdestMove From lo
Move the contents of the hi (lo) register to register Rdest.
mthi RdestMove To hi
mtlo RdestMove To lo
Move the contents register Rdest to the hi (lo) register.

Coprocessors have their own register sets. These instructions move values between these registers and the CPU's registers.

mfcz Rdest, CPsrc Move From Coprocessor z
Move the contents of coprocessor z's register CPsrc to CPU register Rdest.
mtcz Rsrc, CPdestMove To Coprocessor z
Move the contents of CPU register Rsrc to coprocessor z's register CPdest.

Stack Manipulating Instructions

pushgmPush word on stack
popgmPop word from stack
Push and Pop a word off of the stack, assuming the stack pointer points to the next available word on the stack.

Exception and Trap Instructions

rfeReturn From Exception
Restore the Status register.
syscallSystem Call
Register v0 contains the number of the system call (see