CS310 Spring 2008 Schedule, Handouts, and Reading

 
Week
Date
Lec #
Topic 
Reading BEFORE this date 
Out
In
(Due)
1
1/14
L1 Computer system abstractions, digital vs. analog      

1/16
L2 Digital representations, basic electronics Patt and Patel: 1, 2.1, 2.2, 3.1, 3.2; Maccabe: 1.1 1.2, 2.1    

1/17
D1
Meet your TA, unix, binary/hex numbers   HW #1  
2
1/21

MLK Day    

1/23
L3 Transistors, transistor circuits Patt and Patel: 3.1-3.2.5; Uyemura: pp. 15-43 (sections 2.1-2.4.1), Weste and Eshraghian: pp. 5-14 (sections 1.3-1.5.4)    

1/24
D2
Digital representations, switch logic
HW #2 HW #1
3
1/28
L4
Boolean algebra, combinational logic design Patt and Patel: 3.3; Maccabe 2.1
(optional) Weste and Eshraghian: pp. 14-18
(optional) Uyemura: pp 43-55 		   

1/30
L5
Multiplexors, encoders/decoders      

1/31
D3
Multiplexors, decoders
HW #3 HW #2
4
2/4
L6
Storage, latches, clocks Patt and Patel: 3.5-3.6; Maccabe: 2.2-2.5, Weste and Eshraghian: pp. 18-21, Uyemura: pp. 55-63    

2/6
L7
Memories, SRAM, DRAM      

2/7
D4
State elements, sequential circuits   HW #4  
5
2/11
L8
Sequential Circuits, intro to LC-3 datapath      

2/13
L9
Numerical representations, logical operations Patt and Patel: chapter 2; Maccabe: 1.2-1.5, chapters 7, 8    

2/14
D5
State machines and encodings   HW #5 HW #3
6
2/18
L10
Wrap-up and quiz review      

2/20
Q1
Quiz #1      

2/21
D6
Quiz review     HW #4
7
2/25
L11
Indroduction to von Neumann computers, LC-3 ISA overview Patt and Patel: chapters 4, 5.1-5.3, Maccabe: 3.2, 4.1-4.4    

2/27
L12
LC-3 Memory organization, load/store instructions Patt and Patel: 5.4-5.5    

2/28
D7
Conditional branches, loops   HW #6  
8
3/3
L13
Instruction execution, register transfer level (RTL), Traps
Example code		 Patt and Patel: chapters 5.5, 6    

3/5
L14
More RTL, introduction to I/O
   

3/6
D8
More RTL examples, I/O programming
RTL Examples		   HW #7 HW #5

3/10

Spring Break
   

3/12

Spring Break
   

3/13
  Spring Break
   

3/14

Spring Break
   
9
3/17
L15
I/O and interrupt driven I/O
Example code		 Patt and Patel: chapters 7, 8    

3/19
L16
Assemblers, linking and loading Patt and Patel: chapter 9; Maccabe: Chapter 10    

3/20
D9
Details on assembly, linking, loading
  HW #6
10
3/24
L17
Real world examples of linking and loading
Example code		      

3/26
Q2
Quiz #2      

3/27
D10
Quiz Review     HW #7
11
3/31
L18
Machine control register, procedures and procedure calling Patt and Patel: skim chaps 10-13, read chap 14; Maccabe: chap 6    

4/2
L19
Activation record contruction, stack management
Example Code		      

4/3
D11
Stack management   HW #8  
12
4/7
L20
Recursion, heaps, data types, dynamic memory allocation
Example Code		 Patt and Patel, skim chapters 15-17, read chapter 19    

4/9
L21
Data types, heap management, garbage collection
Example Code
More Example Code		      

4/10
D12
Practice with data types, memory allocation   HW #9  
13
4/14
L22
LC-3 Control Logic I Patt and Patel: appendix C    

4/16
L23
LC-3 Control logic II, state diagrams, microcode      

4/17
D13
Control logic and microcode examples   HW #10 HW #8
14
4/21
L24
Interrupts, interrupt control logic, implementation in the LC-3 Patt and Patel: chapter 10; Maccabe: 11.3, 12.2, 12.3    

4/23
Q3
Quiz #3      

4/24
D14
Quiz review     HW #9
15
4/28
L25
Timer interrupts, memory hierarchies      

4/30
L26
Caches, additional topics Patt and Patel: appendix B    

5/1
D15
Course material review     HW #10
17
 
EX
Final Exam - Friday May 9, 7-10pm, Wel 3.502      

Last modified: 04/28/08 Don Fussell, fussell@cs.utexas.edu