CS310H Spring 2008 Schedule, Handouts, and Reading


Week	Date	Lec #	Topic	Reading BEFORE this date	Out	In (Due)
1	1/14	L1	Computer system abstractions, digital vs. analog
	1/16	L2	Digital representations, basic electronics	P&P 1, 2.1, 2.2, 3.1, 3.2; Maccabe 1.1 1.2, 2.1
	1/17	D1	Meet your TA, unix, binary/hex numbers		HW #1
	1/18	L3	Transistors	Uyemura pp. 15-32 (sections 2.1-2.3.1), Weste and Eshraghian pp. 5-10 (sections 1.3-1.5.1)
2	1/21		MLK Day
	1/23	L4	Fabrication, transistor circuits	Patt and Patel: 3.1-3.2.5; Weste and Eshraghian pp. 10-14 (section 1.5.2-1.5.4); Uyemura pp. 32-43 (section 2.3.2-2.4.1)
	1/24	D2	Digital representations, switch logic		HW #2	HW #1
	1/25	L5	Boolean algebra, logic design	Patt and Patel: 3.3 (optional) Weste and Eshraghian: pp. 14-18 (optional) Uyemura: pp 43-55
3	1/28	L6	Combinational logic circuits	Maccabe 2.1
	1/30	L7	Multiplexors, encoders/decoders
	1/31	D3	Multiplexors, decoders		HW #3	HW #2
	2/1	L8	Storage, SR latch, D-latch	P&P 3.5-3.6, Weste and Eshraghian pp. 18-21, Uyemura: pp. 55-63
4	2/4	L9	Clocks and Synchronous circuits	Maccabe 2.2-2.5
	2/6	L10	Memories
	2/7	D4	State elements, sequential circuits		HW #4
	2/8	L11	Memory, SRAM, DRAM
5	2/11	L12	Intro to LC-3 datapath
	2/13	L13	Numerical representations	Patt & Patel: Chapter 2; Maccabe: 1.2-1.5, chapter 7
	2/14	D5	State machines and encodings			HW #3
	2/15	L14	Logical operations, floating-point encodings	Maccabe: chapter 8
6	2/18	L15	Wrap-up and quiz review
	2/20	Q1	Quiz #1
	2/21	D6	Quiz review		HW #5	HW #4
	2/22	L16	Introduction to von Neumann computers	P&P chapter 4
7	2/25	L17	LC-3 ISA overview	P&P chapter 5.1-5.3, Maccabe 3.2, 4.1-4.4
	2/27	L18	LC-3 Memory organization, load/store instructions	P&P 5.4-5.5
	2/28	D7	Conditional branches, loops		HW #6
	2/29	L19	Instruction execution and RTL Example code	P&P 5.5, P&P chapter 6
8	3/3	L20	TRAP instruction, register transfer level (RTL)
	3/5	L21	More RTL, introduction to I/O RTL Examples
	3/6	D8	More RTL examples, I/O programming		HW #7	HW #5
	3/7	L22	I/O and interrupt driven I/O Example code	P&P Chapters 7, 8
	3/10		Spring Break
	3/12		Spring Break
	3/13		Spring Break
	3/14		Spring Break
9	3/17	L23	Review, Process of assembly
	3/19	L24	Linking and loading Example code	P&P Chapter 9, Maccabe Chapter 10
	3/20	D9	Details on assembly, linking, loading			HW #6
	3/21	L25	Linking/loading - real world examples Example code
10	3/24	L26	Review
	3/26	Q2	Quiz #2
	3/27	D10	Quiz Review			HW #7
	3/28	L27	Machine control register, intro to procedures	P&P: skim chaps 10-13, read chap 14; Maccabe: chap 6
11	3/31	L28	Procedure calling protocol, activation records
	4/2	L29	Activation record contruction, examples Example Code
	4/3	D11	Stack management		HW #8
	4/4	L30	Recursion, heaps Example Code
12	4/7	L31	Recursion, data types, dynamic memory allocation Example Code	P&P, Skim chapters 15-17, read chapter 19
	4/9	L32	Data types, heap management Example Code
	4/10	D12	Practice with data types, memory allocation		HW #9
	4/11	L33	Heap management II, Garbage collection
13	4/14	L34	LC-3 Control Logic I	P&P Appendix C
	4/16	L35	LC-3 Control logic II, state diagrams, microcode
	4/17	D13	Control logic and microcode examples		HW #10	HW #8
	4/18	L36	Interrupts and interrupt control logic	P&P Chapter 10
14	4/21	L37	Interrupt implementation in the LC-3	Maccabe 11.3, 12.2, 12.3
	4/23	Q3	Quiz #3
	4/24	D14	Quiz review			HW #9
	4/25	L38	Timer interrupts, memory hierarchies
15	4/28	L39	Caches, Paper discussions	P&P appendix B, "The Genesis of Microprogramming" (Wilkes), "Microprogramming and the Design...." (Wilkes and Stringer)
	4/30	L40	x86 ISA, paper discussion	"The History of the Microcomputer - Invention and Evolution" (Mazor)
	5/1	D15	Course material review			HW #10
	5/2	L41	Hot topics in computer architecture, cookies
17		EX	Final Exam - Thursday May 8, 9-12 am, NOA 1.102

Last modified: 04/28/08 Don Fussell, fussell@cs.utexas.edu