FMCAD 2006
Formal Methods in Computer Aided Design
San Jose, CA, USA
November 12 - 16

The deadline for paper submissions has passed.

PDF Version of the Call for Papers

			   FMCAD 2006
International Conference on Formal Methods in Computer-Aided Design
Sponsored by IEEE, CEDA (Council on Electronic Design Automation) 


	   November 12-16, 2006, San Jose, California
(Note: ICCAD also takes place in San Jose the previous week, Nov. 5-9)

Abstract Submission Deadline	April 28, 2006
Paper Submission Deadline	May 1, 2006
Acceptance notification:    	June 23, 2006
Final version due:		July 28, 2006

FMCAD 2006 is the sixth in a series of conferences on the theory and
applications of formal methods in hardware and system verification. FMCAD
provides a leading forum to researchers in academia and industry for
presenting and discussing groundbreaking methods, technologies,
theoretical results, and tools for reasoning formally about computing
systems.  In addition to the technical program, FMCAD will offer a full
day of tutorials on model checking, theorem proving, decision procedures,
and the application of such methods in industry. FMCAD will also include
panels and affiliated workshops. Topics of interest for the technical
program include, but are not limited to:

+ Foundations: model checking, theorem proving, abstraction and
  refinement techniques, compositional methods, decision procedures,
  SAT-based methods, combining deductive methods with decision
  procedures, and probabilistic methods in verification.

+ Applications of formal methods in design: assertion-based
  verification, equivalence checking, transaction-level verification,
  semi-formal verification, runtime verification, simulation and
  testcase generation, coverage analysis, microcode verification,
  embedded systems, software verification, concurrent systems, timing
  verification, and formal approaches to performance and power.

+ Model-based approaches: modeling and specification languages,
  hardware/software co-design and verification, design derivation and
  transformation, and correct-by-construction methods.

+ Formal methods for the design and verification of emerging and novel
  technologies: nano, quantum, biological, video, gaming, and multimedia

+ Verification applications: tools, industrial experience reports, and
  case studies.


Submissions must be made electronically in PDF format through the FMCAD
Web site,  The proceedings will be published by
the IEEE and will be available online in the ACM Digital Library and the
IEEE Xplore Digital Library. There are two categories of papers:

A. Regular papers.

Authors are invited to submit papers of up to 8 pages using the IEEE
Transactions format on letter-size paper with a 10-point font size (see A
double-blind review process will be used, therefore, submissions must
not identify the authors in any way. We recommend that self-citations
be written in the third person.  Submitted papers must contain original
research that has not been concurrently submitted to any other
conference and that has not previously been published elsewhere. Any
partial overlap with any published or concurrently submitted paper must
be clearly indicated. If experimental results are reported, authors are
encouraged to provide enough access to their data so that results can be
independently verified. Papers should contain a short abstract of
approximately 150 words clearly stating the contribution of the
submission. Finally, a small number of the accepted papers will be
considered for a distinguished paper award.

B. Short papers.

The page limit is 2 pages using the same format as for regular
papers. Short papers can describe applications, case studies, industrial
experience reports, emerging results, or implemented tools with novel
features.  A demonstration will be required for accepted tool papers.

Chairs:               	Aarti Gupta, NEC Labs America
                       	Panagiotis Manolios, Georgia Tech
Local Arrangements:   	Jeremy Levitt, Mentor Graphics
		      	Vigyan Singhal, Oski Technology
Panels:               	Andreas Kuehlmann, Cadence 
Tutorials:            	Leonardo de Moura, Microsoft Research
Webmasters:	      	Sudarshan Srinivasan, Georgia Tech
		      	Daron Vroon, Georgia Tech
Workshops:            	Ganesh Gopalakrishnan, Univ. Utah

Jason Baumgartner, IBM Corporation
Edmund M. Clarke, Carnegie Mellon University
Leonardo de Moura, Microsoft Research
J Strother Moore, University of Texas at Austin

Clark Barrett, New York University, USA 
Jason Baumgartner, IBM Corporation, USA 
Valeria Bertacco, University of Michigan, USA 
Dominique Borrione, Grenoble University, France 
Supratik Chakraborty, Indian Institute of Technology Bombay, India
Alessandro Cimatti, Istituto per la Ricerca Scientifica e Tecnologica, Italy 
Edmund M. Clarke, Carnegie Mellon University, USA 
Leonardo de Moura, Microsoft Research, USA
Rolf Drechsler,  University of Bremen, Germany
Malay K. Ganai, NEC Laboratories America, USA  
Ganesh Gopalakrishnan, University of Utah, USA 
Susanne Graf, VERIMAG, France 
Orna Grumberg, Technion - Israel Institute of Technology, Israel 
Aarti Gupta, NEC Laboratories America, USA
Alan J. Hu, University of British Columbia, Canada 
Warren Hunt, University of Texas, USA 
Andreas Kuehlmann, Cadence Laboratories, USA
Panagiotis Manolios, Georgia Institute of Technology, USA      
Andy Martin, IBM Research Division, USA 
Ken McMillan, Cadence Labs, USA 
John O'Leary, Intel Corp., USA 
Wolfgang Paul, Saarland University, Germany 
Carl Pixley, Synopsys Inc., USA 
Amir Pnueli, NYU, USA 
Natarajan Shankar, SRI International, USA 
Mary Sheeran,  Chalmers University of Technology, Sweden 
Eli Singerman, Intel Corp., Israel 
Vigyan Singhal, Oski Technology, Inc., USA 
Anna Slobodova, Intel Corp., USA 
Fabio Somenzi, University of Colorado at Boulder, USA 
Richard Trefler, University of Waterloo, Canada 
Matthew Wilding, Rockwell Collins Inc., USA 
Yaron Wolfsthal, IBM, Israel