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Projects
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Highly Practical Byzantine Fault Tolerant Replication
We are investigating ways to build highly available (that can tolerate Byzantine failures) and durable (multi-decade scale) distributed storage systems without compromising on practicality--performance (throughput and latency) and cost(hardware,storage,system management)--of the system.
- "Zyzzyva: Speculative Byzantine Fault Tolerance" Ramakrishna Kotla, Lorenzo Alvisi, Mike Dahlin, Allen Clement, Edmund Wong. In Proceedings of 21st ACM Symposium on Operating Systems Principles (SOSP 2007), to appear, WA, 2007. pdf Best paper award.
- "SafeStore : A Durable and Practical Storage System" Ramakrishna Kotla, Lorenzo Alvisi, Mike Dahlin, In Proceedings of Usenix Annual Technical Conference (USENIX 2007), CA, 2007 Paper(pdf) Extended Tech Report(pdf). Best paper award.
- "High Throughput Byzantine Fault Tolerance," Ramakrishna Kotla, Mike Dahlin, In proceedings of the International Conference on Dependable Systems and Networks (DSN 2004), DCC Symposium, Florence, Italy, June 2004. paper(pdf) Talk(ppt)
- "Asymmetric State Machine Replication," Ramakrishna Kotla, Mike Dahlin, Selected for poster at 1st Symposisum Networked System Design And Implementation (NSDI 2004). pdf
- "High Throughput Byzantine Fault Tolerant Services," Ramakrishna Kotla, Mike Dahlin, Poster at 19th ACM Symposium on Operating Systems Principles, Oct 2003 (SOSP 2003) . pdf
- "High Throughput Byzantine Fault Tolerance," Ramakrishna Kotla, M
ike Dahlin, University of Texas at Austin(UTCS-TR-03-58) Dec 2003. pdf
- "High Throughput Byzantine Fault Tolerant Architecture," Ramakrishna Kotla, Masters Thesis, University of Texas at Austin. ps
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Power Aware Systems
I worked on operating system support for next generation multi-core/multi-threaded processors. Specifically, we worked on the design and implementation of power aware OS scheduler for multi-core/multi-threaded processors. We exploit heterogeneity across processes (memory intensive versus cpu intensive) or within a process (different phases of an execution) to reduce power consumption. I was involved with this research while I interned at IBM Austin Research labs, and also while I worked on TRIPS project at UT .
- "Scheduling Processor Voltage and Frequency in Server and Cluster Systems" Ramakrishna Kotla, Soraya Ghiasi, Tom Keller, and Freeman Rawson In proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) Paper(pdf)
- "Co-Scaling Threads and Frequency to Reduce Power Consumption" Ramakrishna Kotla, Ravi Kokku, and Mike Dahlin Poster at Austin Conference on Energy Efficient Design, Austin, 2005, (ACEED'2005) Paper(pdf) Poster(pdf)
- "Characterizing the Impact of Different Memory-Intensity Levels"
Ramakrishna Kotla, Anirudh Devgan, Soraya Ghiasi, Tom Keller, and Freeman Rawson In IEEE 7th Annual Workshop on Workload Characterization (WWC-7), Austin, October 2004 Paper (pdf) Talk (ppt)
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High Speed Packet Classification
I worked on high speed packet classification algorithms for network routers using logic synthesis techniques.
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"A reconfigurable architecture and associated synthesis methodology for high speed packet classification," Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz. In the 11th IEEE/ACM International Workshop on Logic and Synthesis (IWLS 2002), pp 97-102, June 2002, New Orleans, USA . pdf . An award paper at IWLS 2002 which was forwarded to IEEE Transactions on CAD of Integrated Circuits and Systems journal.
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"A high-performance architecture and BDD-based synthesis methodology for packet classification," Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz. In the IEEE Transactions on CAD of Integrated Circuits and Systems, June 2003. ps
"System and method for optimized task scheduling in a heterogeneous processing system", US Patent App. # 20060168571 , filed in 2004 with IBM ARL researchers (Soraya Ghiasi, Tom Keller and Freeman Rawson).
"Scheduling processor voltages and frequencies based on performance prediction and power constraints", US Patent App. # 20060253715 , filed in 2004 with IBM ARL researchers (Soraya Ghiasi, Tom Keller and Freeman Rawson).
SafeStore Storage System
Durable storage system that efficiently stores file system
on local storage as well as at multiple outsourced storage service providers
(like Amazon S3 storage service) to provide
multi-decade scale durability. It exports enhanced NFS 2.0 interface that allows
file system snapshot and recovery apart from regular NFS functionality of
mounting and accessing file system. Please read the paper listed above to
learn about the architecture. The code is not yet ready for a release but
contact me if you are interested.
High Throughput BFT Library (CBASE) and BFT NFS 2.0
High throughput BFT library is developed using MIT's BFT library to provide
high throughput BFT services. We implemented high throughput NFS (v2.0) file system using this library to demonstrate the practicality and performace improvements of this approach. Download code from here .
BFT (Byzantine Fault Tolerant Replication) Library
Fixed bugs in BFT library developed by
Miguel Castro and Rodrigo Rodrigues at MIT. Contact me (kotla_at_cs.utexas.edu) or
Rodrigo (rodrigo_at_mit.edu) for the latest code. To know more about the bugs,
read this . Download code from here .
Scheduler activations for K42 OS
Modified K42 OS kernel developed at IBM
to support scheduler activations interface. This interface helps to easily implement
different thread scheduling policies in K42 without having to bother about low level
details. It is implemented using K42 source tree of March 2004. Contact me if you
are interested in this code.