LESSTR: LESS Technical Reading Group

Spring 2000

Schedule Participants

Time:Thursdays 1:30 to 2:30.
Place:CS Lounge, Taylor 3.128.
Email: lesstr@cs.utexas.edu

For the Spring 2000 semester, we will read and discuss papers related to the recently proposed TRIPS project. This project proposes a design for a Trillion Instruction Per Second microprocessor and explores the impact that such a machine will have on all aspects of system design, including languages, operating systems, fault tolerance, etc.


This schedule is subject to change to coordinate with with faculty recruiting.

Feb 3 Organizational meeting
10 Hrishi Murukkathampoondi Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures. V. Agarwal, M.S. Hrishikesh, Steve W. Keckler and Doug Burger.
17 Brendon Cahoon The Program Dependence Graph and Its Use in Optimization. Jeanne Ferrante, Karl Ottenstein, and Joe D. Warren
24 Sam Guyer Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. W. Lee, R. Barua, D. Srikrishna, J. Babb, V. Sarkar, and S. Amarasinghe. ASPLOS, 1998.
Mar 2 Heather Hanson Hardware Support for Fast Capability-based Addressing. N. Carter, S. Keckler, W. Dally. ASPLOS, 1994
9 Juan Rubio DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design. Todd M. Austin. Micro 1999.
16 Spring Break
23 no meeting
30 Mike Kistler Automatic Partitioning of Signal Processing Programs for Symmetric Multiprocessors. Chris J. Newburn and John P. Shen. PACT 1996.
Apr 6 Ravi Bhargava Transient Fault Detection via Simultaneous Multithreading. Steven K. Reinhardt and Shubhendu S. Mukherjee. ISCA 2000. Available from /projects/cart/public/papers/reinhardt_ft.pdf.
13 Shashank Gupta A new model for integrated nested task and data parallel programming
20 Vikas Agarwal .
27 Raj Desikan Complexity-Effective Superscalar Processors. Palacharla, Jouppi and Smith.


Back to LESS

Last modified: April 24, 2000
Calvin Lin