Study Guide for Test 2

Test 2 will be held on Monday, 04 August 2008. Here are some questions
that covers the material for Test 2. The problems on the test will
be similar to the problems given here.

Memory
* Draw a diagram and explain how a R-S latch works with NOR gates.

* Draw a diagram and explain how a gated D latch works.

* Discuss the pros and cons using SRAM and DRAM.

* Distinguish between RAM, ROM, PROM, and EPROM.

* What is the role of the BIOS?

Problems similar to these-
* What is the address space for a 16-bit machine in KiloBytes?

* If you have 256 MB of RAM in your computer, how many bits do you 
need to address all that memory?

Instruction Set Architecture
* What do you understand by Instruction Set Architecture? Give three 
general classes of instructions with examples.

* In what ways is the RISC philosophy different from CISC in the design 
of a processor?

* If you had to write code in assembly language which type of instruction 
set architecture would you prefer - RISC or CISC? Why?

* What is meant by addressing modes? Give three examples.

Problems similar to these - Given the instruction set of a processor
write assembly code to solve the following problems:

* Perform MOD or XOR operation on a 0-address, 1-address, or 3-address
machine.

* a = a + (b * c) - (d / e) where the values of a, b, c, d, and e are in
registers $1, $2, $3, $4, and $5 respectively.

Computer Performance
* What is pipelining and how does it save time?

* What causes a pipeline stall?

* What do you understand by benchmarking? Give an example of  a benchmark
suite.

* Give a measurable definition of performance. If you were a chip designer 
list three things you could do to improve performance.

* Problems similar to this - AMD Athlon chip with a clock rate of 600 MHz 
is rated 2.4 GFLOPS. How many floating point operations can it perform in 
one clock cycle?