These are scanned copies of the notes that I use to drive my lectures. Note that since lectures don't always go as planned, there may be more (or less) on these than the actual lecture. But this is what was intended.

This page is kept up-to-date at slides/index.html Check that page to be sure you have the up-to-date copy.

  1. Page 1 Tuesday, 17 Sept -- Fixed point, hex.c, ALU, bus, memory
  2. Page 2 Harvard model, Von Neumann machine, memory
  3. Page 3 Thursday, 19 Sept -- review ALU, bus, memory
  4. Page 4 ALU, Program counter, instructions, Format
  5. Page 5 Tuesday, 24 Sept -- Linux I/O, count.c, fetch,decode,execute loop
  6. Page 6 Registers, Instructions, address modes
  7. Page 7 conditional execution.
  8. Page 8 Thursday, 19 Sept -- Floating point instructions, Branches, Condition Codes
  9. Page 9 Condition codes, how to program at machine/assembly language
  10. Page 10 Machine Language Code Sample of machine language
  11. Page 11 Assembly Language Code Sample of assembly language of the above machine language
  12. Page 12 C Tool Chain, IDE, make and Makefiles
  13. Page 13 Tuesday, 1 Oct -- Pointers, strings
  14. Page 14 malloc/free
  15. Page 15 Function calls, return address, stack
  16. Page 16 parameters, base pointer, addressing on stack, ABI
  17. Page 17 Thursday, 3 Oct -- review functions/parameters/stack
  18. Page 18 switch statement, jump tables
  19. Page 19 Input/Output, IN/OUT, memory mapped
  20. Page 20 Protected mode, OS, System calls
  21. Page 21 Interrupts, interrupt vector, enable/disable, NMI, traps, Processor State
  22. Page 22 Tuesday, 8 Oct -- ISA review, PDP-8 memory, registers
  23. Page 23 PDP-8 instructions
  24. Page 24 PDP-8 programming, I/O
  25. Page 25
  26. PDP-8
  27. Page 26 x86 memory, registers
  28. Page 27 x86 addressing modes, instructions
  29. Page 28 x86 I/O, SSE (SISD, SIMD, MIMD)
  30. x86
  31. Page 29 Thursday, 10 Oct -- Alignment, Tool chain for multiple C files
  32. Page 30 Loading
  33. Page 31 Text, Data, BSS sections, ELF section
  34. Page 32 Linking
  35. Page 33 Multiple C files, header files, Make
  36. Page 34 Tuesday, 15 Oct -- Libraries
  37. Page 35 Shared Libraries, Relocatable, PIC (Position Independent Code), reentrant
  38. Page 36 C++ Function overloading, name mangling
  39. Page 37 Thursday, 17 Oct -- Performance, strlen example
  40. Page 38 Code optimization, assembly language
  41. Page 39 Code optimization, in C
  42. Page 40 Coding optimization, compiler optimization, better design
  43. Page 41 gprof as a profiling tool -- time spent
  44. Page 42 gcov as a profiling tool -- lines executed
  45. Page 43 Caching, speed, write back, write thru
  46. Page 44 Caching replacement, dirty bit, Optimal, FIFO, LRU, LFU
  47. Page 45 Caching review of concepts.
  48. Page 46 Fully associative, Direct Mapped, Set Associative, Cache friendly code
  49. Page 47 DMA I/O, Multiprocessors, L1, L2, L3, Cache Coherence, MSI
  50. Page 48 Assemblers, location counter, opcode table, symbol table, forward references, two pass, one pass, fix-ups.
  51. Page 49 Cache Coherence, MSI
  52. Page 50 Pipelines, The Laundry Example
  53. Page 51 Floating Point Pipeline
  54. Page 52 Pipelining Instructions; Data Dependencies, Control Dependencies
  55. Page 53 Bubbles, Branch Prediction, Speculative Execution, Bernstein's Conditions
  56. Page 54 Out of Order Processors, Parallelism, Threads
  57. Page 55 32-bit to 64-bit processors
  58. Page 56 64-bit C programming model
  59. Page 57 Virtual Memory, page tables, TLB, performance, Hardware and Software Systems
  60. Page 58 Malloc/Free Implementation, best fit, first fit, next fit
  61. Page 59 Memory Pools, Buddy System, Fragmentation, Errors, Valgrind
  62. Page 60 Garbage Collection, Mark/Sweep, in C?, Tagged Architectures
  63. Page 61 HP 2100
  64. Page 62 PDP-11, Address Modes, Double Operand instructions
  65. Page 63 PDP-11, Single Operands, branches, I/O
  66. Page 64 CDC 6600 CPU, PPU hardware threads
  67. Page 65 CDC 6600 registers, instructions
  68. Page 66 Burroughs B5500, numbers, memory, stack mode
  69. Page 67 Burroughs B5500, PRT, character mode
  70. Page 68 Burroughs B5500, I/O, no assembly language, MCP
  71. Page 69 Sun SPARC, 32-bit, registers, Delayed Jumps
  72. Page 70 Sun SPARC, stack frame
  73. Page 71 Sun SPARC, Register Windows
  74. Page 72 Sun SPARC, Instructions
  75. Page 73 Sun SPARC, Traps, TBR,
  76. Page 74 Diff, context diff, patch files
  77. Page 75 example diff output
  78. Page 76 Source code control data bases, SCCS, RCS
  79. Page 77 ARM used in iPad
  80. Page 78 ARM, registers
  81. Page 79 ARM, instruction set
  82. Page 80 ARM, conditional instructions
  83. Page 81 AMD Jaguar x86, memory, caches
  84. Page 82 AMD Jaguar x86, instructions, CPU
  85. Page 83 ARM 32-bit arithmetic instructions
  86. Page 84 ARM Instruction formatting
  87. Page 85 ARM Condition codes
  88. Page 86 ARM Arithmetic instruction options
  89. Page 87 ARM addressing modes
  90. Page 88 ARM, Thumb
  91. Page 89 ARM, Thumb 2, Jazelle, Java byte code
  92. Page 90 PowerPC Architecure
  93. Page 91 PowerPC Registers
  94. Page 92 PowerPC Instructions
  95. Page 93 Itanium -- motivation, EPIC
  96. Page 94 Itanium -- memory, registers, conditional execution
  97. Page 96 Itanium -- SIMD, multiply-add, addressing modes
  98. Page 97 Itanium -- Caches, functional units
  99. Page 98 Itanium -- branches, function calls, register stacking
  100. Page 99 Itanium -- application registers, instruction format
  101. Page 100 Itanium -- loads, speculative and prefetch, ALAT
  102. Page 101 #ifdef, #endif for multiple processors
  103. Page 102 Prefetch, Branch Prediction
  104. Page 103 ARM-8, 64-bit, memory, registers, Exception Levels
  105. Page 104 ARM-8, Instruction format, branches, addressing modes
  106. Page 105 ARM-8, Interesting instructions

All slides (May overload your browser -- LOTS of big images)