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Research  »  Current Projects  »  Shangri-La


 Project Summary

Network systems, designed to support packet processing applications efficiently, must meet two, often-conflicting, requirements:
  1. Support a large number of high-bandwidth links, and hence large system throughputs
  2. Offer a wide range of flexible, upgradeable services (such as VPN, intrusion detection, and differentiated services) in addition to conventional bridging and forwarding functions
To meet simultaneously the demands of high performance and flexibility, network processors (NPUs) with designs optimized for processing packets at high rates have emerged. NPUs, and more generally the systems designed using NPUs, contain multiple heterogeneous processors, complex memory subsystems, and a non-uniform inter-processor communication architecture.

Unfortunately, the methodologies and tools needed for programming such network systems effectively are in their infancy. Today, to program such systems, programmers are required to be intimately familiar with the hardware; programmers develop hand-tuned code that manages carefully a variety of network system resources to ensure that the system can process incoming traffic at link speeds. This approach is tedious, slow, and yields code that is difficult to port from one network system to another. With the next-generation of network systems supporting a larger number and types of processor cores, more diverse memory hierarchies, and more complex processor interconnects, the difficulty in programming network systems will only increase over time.

The success in developing and deploying multi-service networks using programmable components depends critically on the design of a programming environment that simplifies software development for network systems. The objective of Project Shangri-La is to design a unified, easy-to-use programming environment that facilitates rapid development of portable, high-performance packet processing applications on NPU-based network systems.

 Team Members

Ravi Kokku, Ajay Mahimkar, Jayaram Mudigonda, Taylor Riché Nishit Shah, Upendra Shevade

 Project Publications

Titles link to the abstract. Use pdf icons in the right margin to download the publication

Adaptive Processor Allocation in Packet Processing Systems.
Ravi Kokku, Upendra Shevade, Nishit Shah, Harrick Vin, and Mike Dahlin.
Under Review.

A Case for Data Caching in Network Processors.
Jayaram Mudigonda, Harrick M. Vin and Raj Yavatkar.
Under Review.

A Programming Environment for Packet-processing Systems: Design Considerations.
Harrick M. Vin, Jayaram Mudigonda, Jamie Jason, Erik J. Johnson, Roy Ju, Aaron Kunze, and Ruiqi Lian.
In the Workshop on Network Processors & Applications - NP3. Held in conjunction with The 10th International Symposium on High-Performance Computer Architecture February 14-18, 2004

A Case for Run-time Adaptation in Packet Processing Systems
Ravi Kokku, Taylor Riche, Aaron Kunze, Jayaram Mudigonda, Jamie Jason and Harrick Vin
In the 2nd Workshop on Hot Topics in Networks (HOTNETS-II), Nov 2003, Cambridge, MA, USA. Also appears in ACM SIGCOMM Computer Communication Review, Volume 34, Issue 1 (January 2004).

Packet Classification Under Stringent Space-Time Constraints
M. Kounavis, A. Kumar, H.M. Vin, R. Yavatkar, and A. Campbell
Submitted for publication, June 2003.

Impact of Network Protocols on Programmable Router Architectures
B. Hardekopf, T. Riche, J. Mudigonda, M. Dahlin, H.M. Vin, and J. Kaur
Submitted for publication, April 2003.

Directions in Packet Classification for Network Processors
M Kounavis, A. Kumar, H.M. Vin, R. Yavatkar, and A. Campbell
In Network Processors Design: Issues and Practices, Volume 2, Edited by P. Crowley, M. Franklin, H. Hadimioglu, and P. Onufryk, Morgan Kaufmann, 2003. (Also in Proceedings, 2nd Workshop on Network Processors, February 2003.)

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