Introduction













Hi! I used to be a Ph.D. student
in Department of Computer Sciences University of Texas at Austin / UT Direct
I finished my Ph.D. study in May 2006 and started working at a search engine marketing company conducting research on algorithms.


What's New?

Office Phone: 781 213 6435
Home Phone: 512 517 6590

Email: xianglong.huang
at gmail

Research

Improving memory performance is a very important problem because modern hardwares have an increasingly larger memory gap. My main focus is to leverage memory manager and compiler to improve memory performance for object oriented programs.

Selected Publications

DCR: Xianglong Huang, Steve Blackburn, David Grove, and Kathryn S McKinley.
Fast and Efficient Partial Code Reordering: Taking Advantage of Dynamic Recompilation, to apprear in the International Symposium on Memory Management (ISMM), Ottawa, Canada, June 2006.

DCM: Xianglong Huang, Brian T Lewis, Kathryn S McKinley. Dynamic Code Management: Effective Algorithms for Full Code Locality Optimization in Managed Runtimes, In the Second International Conference on Virtual Execution Environments (VEE), Ottawa, Canada, June 2006.

OOR: Xianglong Huang, Stephen M Blackburn, Kathryn S McKinley, J Eliot B Moss, Zhenlin Wang, Perry Cheng. The Garbage Collection Advantage: Improving Program Locality,  In the proceeding of 19th Annual ACM Conference on Object-Oriented Programming, Systems, Languages, and Applications (OOPSLA 2004) Vancouver, British Columbia, Canada, Oct. 2004.

DSS:  Huang, Xianglong, J. Eliot B. Moss, Kathryn S. Mckinley, Steve Blackburn, and Doug Burger. "Dynamic SimpleScalar: Simulating Java Virtual Machines." The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-03-03. February 2003. The latest link for DSS.

Impulse:Xianglong Huang, Zhenlin Wang, Kathryn S. McKinley. Compiling for the Impulse Memory Controller , In the proceedings  of The 10th International Conference on Parallel Architectures and Compilation  Techniques (PACT 2001). Barcelona, Spain, Sep. 2001.

Loop transformation:Xianglong Huang, Steve Carr, and Phil Sweany. Loop Transformations for Architectures with Partitioned Register Banks  In the proceedings of Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001). Snowbird, Utah, June 2001.

Multi-Thread Library:
    1. Michael Bedy, Steve Carr, Xianglong Huang, and Ching-Kuang Shene,
"A Visualization System for Multithreaded Programming", in the
Proceedings of the 31st Annual SIGCSE Technical Symposium on
Computer Science Education, March 2000.
    2. Michael Bedy, Steve Carr, Xianglong Huang, and Ching-Kuang Shene,
"The Design and Construction of a User-Level Kernel for Teaching
Multithreaded Programming
", ASEE/IEEE Frontiers in Education, San Juan, Puerto Rico, November 1999.

Research Experiences

Research assistant for Professor Kathryn McKinley (Spring 2001 - present)

Internship, Intel Programming System Lab (May 2005-December 2005)

Internship, IBM T.J. Watson Research Center (Summer 2004)

Internship, Sun Microsystem (Summer 2002)

Research assistant for Professor Steven Carr (July 1999 - August 2000)

Research assistant for Professor Ching-Kuang Shene (July 1998 - July 1999)

Research Group

DaCapo is a multi-institution research project that aims to improve the performance of Java programs, with a particular focus on garbage collection and memory performance. I'm working with my advisor Kathryn S. McKinley here at UT.

Schedule

TBD