Description: Macintosh SSD:Users:ardavan:Desktop:Card.pdf

The Linear Algebra Processor (LAP)

Cycle Accurate Simulator



Current version: 0.1


·      General Matrix Matrix Multiplication (GEMM)

·      Rank-K Update (Panel-Panel Multiply)







The Team


Project Leader:


 Ardavan Pedram



Description: Macintosh SSD:Users:ardavan:Desktop:2013-07-29 16.07.02.jpgText Box: Ardavan received his PhD from UT Austin in 2013. He joined Stanford as a Post-doctoral scholar in 2014. Ardavan is a member of the VLSI Research Group working with Professor Mark Horowitz. He is also a member of the FLAME group. His research interests include high performance computing and computer architecture. 

Ardavan started the LAP concept in 2006 as part of his Master’s degree. He started developing the LAP simulator in 2010. He is leading the linear algebra processor algorithm/architecture codesign, simulation, and hardware generation projects in UT Austin and Stanford University.























 Mochamad Asri



Text Box: Mochamad is a second year PhD Student at The University of Texas at Austin. He is a member of Computer engineering research center. He is working towards his PhD under supervision of professor Andreas Gerstlauer.

Mochamad started developing for the LAP simulator since 2013. He also is working on integrating the LAP simulator into MARSSx86 simulator.















Robert van de Geijn


Description: Macintosh SSD:Users:ardavan:Desktop:Geijn.jpgText Box: Robert is a Professor of Computer Science and a member of the institute for computational engineering and sciences (ICES) at The University of Texas at Austin. He heads the Flame project researching on libflame and BLIS libraries. He also led development of PLAPACK library.

Robert’s work on high performance hierarchical layered libraries inspired the concept of the LAP and its memory hierarchy.
















Andreas Gerstlauer


Created with GIMPText Box: Andreas is an Associate Professor of Electrical and Computer Engineering and a member of Wireless Networking and Communication Group (WNCG) at The University of Texas at Austin. Andreas lead a research group in UC Irvine to develop electronic system-level (ESL) design automation tools.

Andreas helped with design of PE data-path in the LAP simulator. He is closely involved in the integration of the LAP simulator into MARSSx86 simulator.























1-    Ardavan Pedram, Robert van de Geijn, and Andreas Gerstlauer:

"Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures,"

IEEE Transactions on Computers (TC) Special Issue on Energy Efficient Computing, Volume 61, Issue 12, Page(s) 1724 – 1736, December 2012. 


2-    Ardavan Pedram, Andreas Gerstlauer, and Robert van de Geijn:

"On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators,"

The 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2012). (Acceptance rate 28%)


3-    Ardavan Pedram, Andreas Gerstlauer, and Robert van de Geijn:

"A High-performance, Low-power Linear Algebra Core,"

The 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP2011). (Acceptance rate 25%)