Behnam Robatmili

         Department of Computer Science, University of Texas at Austin, PHD Student My Curriculum vitae

          beroy@cs.utexas.edu 

Right now, I'm interning at AMD Austin working on designing prefetchers for future modern processors.

RESEARCH INTERESTS

bullet High performance computer architecture (SuperScalar, Sppatially Partitioned, Multi-processors, SMT ...)
bullet Code reuse and criticality-assisted optimization for bulk-commit architectures
bullet Improving single thread peformance by extracting implicit parallelism in a grid of composable cores
bullet Techniques for high performance linear algebra libaries on the new architectures
bullet Improving compilers for new architectures using Machine Learning

RESEARCH ACTIVITIES

Execution Reuse for Bulk-commit Processors, Jan 2009 - Present, In this study, I explore several techniques for exploiting temporal locality in instruction windows of processor with bulk commit capability.

Criticality-directed Accelation for Bulk-commit Processors, Jan 2009 - Present, In bulk-commit processprs, inter-bulk communication extend between atomically-commited instruction groups. Inter-bulk communications are more likely to happen on the critical path. In this study, we detect and optimize inter-bulk communication for better performance/power.

Extracting Concurrency in Single-thread Applications in a Composable Multicore System, Oct 2007 - Present, Balancing concurrency and communication is a challenge for future distributed processors. The purpose of this project is automatically map the instructions and select the cores for each block of the code. Instruction mapping for each block is done adaptively according to abstracted concurrency hints provided by th compiler.

The Highest Performing Program on TRIPS, Mar 2007 - Aug 2007, Extending the well known algorithm for matrix-multiplcation by Goto to a systolic-like algorithm running on a 2-D TRIPS ALU grid. This algorithm outperforms the implementation Goto's hand tuned code on all of then other general purpose processors so far!

Register Bank Allocation for Specially Partitioned Processors, Mar 2006 - Sep 2007, To choose a register bank for each variable, this algorithm considers the critical path through the program, delays from registers to consuming instructions, and other resource constraints imposed by the hardware.

Policy Search Optimization for Spatial Path Planning, Apr 2007 - Nov 2007, Improving the instruction scheduling for TRIPS instruction blocks using a Reinforment Learning method called NEAT.

EDUCATION

University of Texas at Austin
PhD in Computer Science, (2005- present)

Advisor: Dr. Doug Burger

University of Tehran
M.S. in Computer Engineering, (2001- Feb 2004)

Thesis: "Design and Simulation of an SMT Network Processor"

GPA: 19.19/20

Advisor: Dr. Nasser Yazdani

Consultant: Dr. Mehrdad Nourani
 

University of Tehran
B.S. in Computer  Engineering, June 2001
Bachelor Project: "Elaboration Process in Object Oriented HDL Intermediate Formats"
 

PUBLICATIONS

Dong Li, Behnam Robatmili and Doug Burger, "Hybrid Operand Communication for Dataflow Processors," 2009 Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures, June 21st, 2009 Austin, TX, in conjunction with 35th Intl. Symposium on Computer Architecture.
Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeff Diamond, Paul V. Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili , Aaron Smith, James Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley, "An Evaluation of the TRIPS Computer System," The 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '09). Washington, DC. March, 2009. Best Paper Award.
Behnam Robatmili , Katherine Coons, Doug Burger and Kathryn McKinley, "Strategies for Mapping Dataflow Blocks to Distributed Hardware," The 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '08). Lake Como, Italy. November, 2008. Tied for Best Student Presentation award (presented by Katie Coons).
Behnam Robatmili , Katherine Coons, Doug Burger and Kathryn McKinley, "Register Bank Assignment for Spatially Partitioned Processors," 21th Annual Workshop on Languages and Compilers for Parallel Computing (LCPC08), 2008.
Katherine Coons, Behnam Robatmili , Matthew Taylor, Bert Maher, Doug Burger and Kathryn McKinley, "Feature Selection and Policy Optimization using Reinforcement Learning for Distributed Instruction Placement," 17th International Conference on Parallel Architectures and Compilation Techniques (PACT), 2008 (to appear).
Behnam Robatmili , Katherine Coons and Doug Burger, "Balancing Local and Global Parallelism for Single-Thread Applications in a Composable Multi-core System," 2008 Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures Bejing, China, June 22, 2008, in conjunction with 35th Intl. Symposium on Computer Architecture.
Jeffrey Diamond, Behnam Robatmili , Stephen W. Keckler, Kazushige Goto, Doug Burger and Robert van de Geijn, "High Performance Dense Linear Algebra on Spatially Partitioned Processors," Symposium on Principles and Practice of Parallel Programming (PPOPP), Feb 2008.
Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili, Doug Burger, and Kathryn S. McKinley. Policy, "Search Optimization for Spatial Path Planning," In NIPS-07 workshop on Machine Learning for Systems Problems, December 2007. (Two page extended abstract.).
Bill Yoder, Jim Burrill, Robert McDonald, Kevin B. Bush, Katherine Coons, Mark Gebhart, Sibi Govindan, Bertrand Maher, Ramadas Nagarajan, Behnam Robatmili, Karthikeyan Sankaralingam, Sadia Sharif, Aaron Smith, "Software Infrastructure and Tools for the TRIPS Prototype," Third Annual Workshop on Modeling, Benchmarking and Simulation, MOBS 2007.
Behnam Robatmili , Nasser Yazdani, Somayeh Sardashti, Mehrdad Nourani, "Thread-Sensitive Instruction Issue for SMT Processors,"  IEEE Computer Architecture Letters, Volume 3, Aug. 2004.
Behnam Robatmili , Nasser Yazdani, Mehrdad Nourani, "Optimizing SMT Processors for Packet Processing," Microprocessors and Microsystems, Volume 29, Issue 7, 1 September 2005, Pages 337-349
Behnam Robatmili , Nassar Yazdani, Mehrdad Nourani, "NPSMT: A Simulation Environment for SMT Packet Processors," to ISCA 17th International Conference on Parallel and Distributed Computing Systems (PDCS-2004), San Francisco.
Hossein Mohammadi, Behnam Robatmili ,  Nasser Yazdani and Mehrdad Nourani, "HASIL: Hardware Assisted Software-based IP Lookup for Large Routing Tables," Proc. of 11th IEEE International Conference on Networking (ICON'2003), Sydney, Australia, pp 99-105, Sep. 2003.

WORK EXPERIENCE AND TEACHING

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Internship at Advance Micro Devises (AMD), Research and Developement Labs (RADL), Austin, Texan. Desing and evaluate prefetching mechanism for future modern AMD processors, Summer and Fall 2009

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Teaching assistant for Sets, Logic and Functions (CS313K), Computer Science Department, University of Texas at Austin, Spring 2008

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Teaching assistant for Computer Architecture (CS352), Computer Science Department, University of Texas at Austin, Fall 2005, Spring 2007

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Teaching Undergraduate Compiler Course in University of Tehran ECE Department, Fall 2004.

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Teaching assistant for Compiler course for 6 semesters (2000-2003) at University of Tehran ECE Department in University of Tehran. 

FAVORITE LINKS

WWW Computer Architecture Page

EE Times

The Register

PCPER