Using handout 11, we went through strategy 2 step by step.

step 1) wrote the sum of products A'B + AB' (that's what we started from) See the bottom of this overview for how to form a sum of products given the truth table.

step 2)Negated the sum of products to obtain the inputs for OUT = 0, and simplified to obtain: (A+B')*(A'+B)

Note, when you have + in your equation, it means that you have either one of the values to be 1 for the result to be one, so you will connect your transistors in parallel. When you have * in your equation, both values have to be 1 for the result to be 1, so you connect transistors in series. Please, think about input values as well ( you do not invert the inputs when you have a combination for OUT = 0, because you have already inverted to obtain OUT = 0, and the N-type transistors are on when the input is 1).

step 3)We drew the N-type transistors (always on the bottom, connected to ground), with the inputs identical to those obtained in step 2. So, (A + B' ) became the top pair of N-type transistors connected in parallel, and (A' + B) became the bottom pair of N-type transistors connected in parallel.

step 4)Obtained the P-type structure (always connects to power) by converting the N-type:

• what was connected in series becomes connected in parallel

• what was connected in parallel becomes connected in series
• N-type transistors are replaced by P-type
• inputs remain the same

so, (A + B') – the top pair of N-type transistors was converted into the left pair of the P-type transistors.

Note, we will not have a problem of connecting power to ground if we construct the circuit in the way above (since the top is the inverted bottom, the top and the bottom will never be on simultaneously).

Finally, calculate the total number of transistors required: 4N-type + 4P-type for structure, plus 4 for inverters = 12

Using handout 11, implemented strategy 3.

Noted that by negating the original expression (A'B + AB') twice we would obtain ((A' * B)' * (A * B')' )', which is exactly three NAND gates, plus inverters for A and B.

Calculated the total number of transistors to be: 3 * 4 = 12 for three NAND gates, and 4 for inverters, to result in the total of 16.

Note: when asked to use strategy 3, drawing logic gates is an intermediate step, your final design has to be with transistors. Since you already know how to construct common logic gates from transistors, you just replace each of your logic gates by the corresponding transistor combination.

Discussed multiplexors

How many inputs can we have a to multiplexor provided we have n selector wires? (2^n)

The multiplexor provides us with an opportunity to have many different results ready simultaneously (for example, both A and A' as in the picture), and then selecting the result currently needed by setting the selector wire to the required value. For example, in the picture, set the selector to 0 to have A' at the OUT :

• (A * 0) in the upper AND gate produces a 0

• (A' * 1) in the lower AND gate produces an A'
• (0 + A') in the final OR gate produces A'

The multiplexor on the left is designed in a manner that the selector value of 0 chooses A', and the selector value of 1 chooses A. Usually, you assign an ordering to the 2^n inputs of the multiplexor, and that determines the actual value on the selector to select the input.

How to obtain a sum of products

• Looking at the table on the left, we find the values of out that are 1. These are the rows of the table that will form our sum of products. In this example, there are two such rows (2nd and 3rd).

• Next, we look at each row individually. Taking 2nd row, when A = 1 and B = 0, out = 1. You can write this as A * B' ( 1 * 0' = 1 * 1 = 1 <-out). Note, you have to have both, not either, A and B values as above in order for the current to be 1.

The general rule is: looking at just one row, if there is a 0 in the cell, invert the respective multiplier. All of the row entries are included in the final product, some of them inverted, some of them not. So, if you had 0 0 1 0 1 as the entries for one of the rows in your table (the column headings being from A to E), your product would have to include every letter: A' * B' * C * D' * E. The inverted inputs are exactly the ones for the 0 cell entries. All of the letter values affect the product, so you cannot skip any.

• Having looked at each row individually, we have obtained (A* B' ) for 2nd row, and (A' * B' ) for 3rd row. Verify! You will have formed individual products for each row.

• Since out = 1 for either of the two, we would sum the obtained expressions for individual rows (so that the sum is 1 whenever at least one of the combinations allows)
• We obtain (A * B' ) + (A' * B' ) . Since it is effectively a sum of individual products, you call it a sum of products.
• Usually, after obtaining the sum of products you will try to simplify it. The above expression can be simplified by factoring B' out: (A * B' ) + (A' * B' ) = B' (A + A')
• Since (A + A') = 1, the expression becomes just B'

Strategy 2: (A*B')

Since we started with a formula, and not with a truth table, we go straight to step 2.

step 2) negate sum of products to obtain OUT=0. Since A*B' is our only product, we negate it, (A*B')'=A'+B

step 3) draw the N-type transistors connected to ground with the inputs identical to those obtained in step 2.

step 4)obtain the P-type structure by keeping the inputs, and replacing all the parallel connections by series, and the series by parallel.

Calculate the number of transistors required: 2 P-type + 2 N-type + 2 for inverter = 6 total

Strategy 3: (A*B')

We can see that if we negate A*B' twice, we obtain (A'+B)', which fits exactly for the NOR gate. A' and B become the inputs to the NOR gate.

Calculate the number of transistors required: 4 for NOR gate + 2 for the inverter = 6 total