Distributed Microarchitectural Protocols in the TRIPS Prototype Processor
K. Sankaralingam, R. Nagarajan, R. McDonald, R. Desikan, S. Drolia, M.S. Govindan, P. Gratz, D. Gulati, H. Hanson, C. Kim, , H. Liu, N. Ranganathan, S. Sethumadhavan, S. Sharif, P.K. Shivakumar, S. W. Keckler, D.C. Burger
The 36th International Symposium on Microarchitecture (MICRO), December 2006.
A NUCA Substrate for Flexible CMP Cache Sharing
Jaehyuk Huh, Changkyu Kim , Hazim Shafi, Lixin Zhang, Doug Burger, and Stephen W. Keckler
The 19th ACM International Conference on Supercomputing (ICS), June 2005.
Scaling to the End of Silicon with EDGE Architectures
D. Burger, S.W. Keckler, K.S. McKinley, M. Dahlin, L.K. John, C. Lin, C.R. Moore, J. Burrill, R.G.McDonald, W. Yoder, and the TRIPS Team
IEEE Computer, July 2004.
TRIPS: A Polymorphous Architecture for Exploiting ILP, TLP, and DLP
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, D. Burger, S.W. Keckler, R.G. McDonald, and C.R. Moore.
ACM Transactions on Architecture and Code Optimization (TACO), March 2004.
(Extended version of our ISCA 2003 TRIPS paper)
NUCA: A Non-Uniform Cache Access Architecture for Wire-Delay Dominated On-Chip Caches
Changkyu Kim, D.C. Burger and S.W. Keckler.
IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Nov.-Dec. 2003.
Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture
K. Sankaralingam, R. Nagarajan, H. Liu, C. Kim, J. Huh, D.C. Burger, S.W. Keckler, and C.R. Moore
IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Nov.-Dec. 2003.