Trends in modern CPU architecture present new
demands and opportunities
for the compiler writer:
- Larger memories: expansion of code size is not as costly as before;
might trade code size for speed.
- The compiler can coexist with the running program, for just-in-time
- High cost for cache misses: a cache miss can cause
the CPU to stall (wait)
for many execution cycles.
Code may be reordered to avoid cache misses.
- Multiple processors: using the processors effectively (getting
a speedup of n from n processors) is a difficult challenge.
Strip mining may be used to send parts of loops (and memory)
to different processors.
- Superscalar architecture: code may be re-ordered to take advantage
of out-of-order and speculative execution.
- As number of transistors on chip increases, things that were software
become hardware: math subroutines, message passing, memoization, dynamic