Ramadass Nagarajan
ramdas@cs.utexas.edu

Department of Computer Sciences
The University of Texas at Austin
1 Texas Longhorns, #C0500
Austin, Texas 78712

Office: ACES 3SEo5H
Ph: (512) 232-7443

Full List of Publications

BibTex File (for all my publications)

Referreed Conference Papers

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert McDonald, Rajagopalan Desikan, Saurabh Drolia, M.S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, and Doug Burger.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2006. (bib|pdf)
Dataflow Predication,
Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert McDonald, Doug Burger, and Stephen W. Keckler.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2006. (bib|pdf)
Critical Path Analysis of the TRIPS Architecture,
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler.
Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), March 2006. (bib|pdf)
Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures,
Ramadass Nagarajan, Sundeep K. Kushwaha , Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler.
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2004. (bib|pdf)
Exploiting ILP, DLP, and TLP Using Polymorphism in the TRIPS Architecture,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, D. Burger, S.W. Keckler, and C.R. Moore.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA), June 2003. (bib|pdf)
A Wire-Delay Scalable Microprocessor Architecture for High Performance Systems,
S.W. Keckler, D. Burger, C.R. Moore, Ramadass Nagarajan, Karthikeyan Sankaralingam, V. Agarwal, M.S.Hrishikesh, N. Ranganathan, and P. Shivakumar.
Proceedings of the 2003 International Solid-State Circuit Conference (ISSCC), February 2003. (bib|pdf))
A Design Space Evaluation of Grid Processor Architectures,
Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, and Stephen W. Keckler.
Proceedings of the 34th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2001. (bib|pdf)
Content-Boosted Collaborative Filtering for Improved Recommendations,
Prem Melville, Raymond J. Mooney, Ramadass Nagarajan.
Proceedings of the Eighteenth National Conference on Aritificial Intelligence (AAAI-2002), July 2002. (bib|pdf)

Referreed Journal Articles

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture ,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, D. Burger, S.W. Keckler, and C.R. Moore.
IEEE Micro, 23:6, November/December 2003. (Appears as one of Micro's Top Picks from Microarchitecture Conferences) (bib|pdf)
TRIPS: A Polymorphous Architecture for Exploiting ILP, TLP, and DLP,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, D. Burger, S.W. Keckler, R.G. McDonald, and C.R. Moore.
ACM Transactions on Architecture and Code Optimization (TACO), 1:1, March 2004. (bib|pdf)

Book Chapters

A Technology-Scalable Architecture for Fast Clocks and High ILP,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Doug Burger, and Stephen W. Keckler.
Interaction Between Compilers and Computer Architectures (INTERACT), edited by G. Lee and P. Yew, pp. 117-139, Kluwer Academic Publishers, 2001. (bib|pdf)

Referred Workshop Papers

Lightweight Distributed Selective Re-Execution and its Implications for Value Speculation,
Raj Desikan,Simha Sethumadhavan, Ramadass Nagarajan, D. Burger, and Stephen W. Keckler.
Proceedings of the First Value Prediction Workshop (VPW), at the 30th International Symposium on Computer Architecture (ISCA), June 2003. (bib|pdf)
Content-Boosted Collaborative Filtering,
Prem Melville, Raymond J. Mooney, Ramadass Nagarajan.
Proceedings of the SIGIR 2001 Workshop on Recommender Systems, pp. 16-23, September 2001. (bib|pdf)

Technical Reports

Combining Exit Prediction and Hyperblocks to Improve Front-End Bandwidth and Performance,
Nitya Ranganathan, Ramadass Nagarajan, Daniel Jimenez, Doug Burger, Stephen W. Keckler, and Calvin Lin.
UT-Austin Computer Sciences Technical Report TR-02-41, September 2002. (bib|pdf)
SimpleScalar Simulation of the PowerPC Instruction Set Architecture,
Karthikeyan Sankaralingam, Ramadass Nagarajan, Stephen W. Keckler, and Doug Burger.
UT-Austin Computer Sciences Technical Report TR-00-04, February, 2001. (bib|pdf)

Talks

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. The 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Orlando, FL. December 13, 2006.
Dataflow Predication. The 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Orlando, FL. December 11, 2006.
Critical Path Analysis of the TRIPS Architecture. 2006 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX. March 20, 2006.
Design and Evaluation of the TRIPS Prototype Processor. Intel, Bangalore. January 31, 2006 (Invited Talk).
Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. EPIC Workshop, Palo Alto, CA. March 21, 2004 (Invited Talk).
Exploiting ILP, DLP, and TLP Using Polymorphism in the TRIPS Architecture. The 30th International Symposium on Computer Architecture (ISCA), San Diego, CA. June 11, 2003.
A Technology-Scalable Architecture for Fast Clocks and High ILP. Workshop on Interaction between Compilers and Computer Architectures (INTERACT-5), Monterrey, Mexico. January 21, 2001.