- "Scalable Hardware Memory Disambiguation for High-ILP Processors," S. Sethumadhavan,
R. Desikan, D. Burger, C.R. Moore, and S.W. Keckler. 36th Annual International
Symposium on Microarchitecture (MICRO), December 2003.
- "Scalable Selective Re-execution for Speculative Dataflow Architectures," R. Desikan, S. Sethumadhavan, D. Burger, and S.W. Keckler. 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October, 2004.
- "Coherence Decoupling: Making Use of Incoherence," J. Huh, J. Chang, D. Burger, and G.S. Sohi. 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October, 2004.
- "A NUCA Substrate for Flexible CMP Cache Sharing," J. Huh, C. Kim, H. Shafi, L. Zhang, D. Burger and S.W. Keckler. 19th ACM International Conference on Supercomputing (ICS), June, 2005.
- Exploring the Design Space of Future CMPs," J. Huh, D. Burger, and S.W. Keckler. 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT), September, 2001.
- "Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic," P. Shivakumar,
M. Kistler, S.W. Keckler, D. Burger, and L. Alvisi. International Conference on Dependable Systems and Networks (DSN), pp. 389-398, June, 2002.