CS395T: Hardware and Software for Multicore Systems

Spring 2007 (55213) -- Emmett Witchel

Class Abstract

We will read and discuss recent research in transactional memory and emerging parallel architectures like Sun's Niagara and IBM's Cell.

Admin

Class times

M 2:00-5:00  TAY 3.144 (ACES 2.444)

Instructor

Emmett Witchel
Office: ACES 6.240
Telephone: 232-7889
E-mail: witchel - at - cs.utexas.edu
Office hours: M 5-6pm or by appointment.

Prerequisites

There are no formal prerequisites for this class, but students should have a strong background in at least one of computer architecture and operating systems.

Course Organization and Workload

The course consists of reading at least two papers per class meeting, and discussing those papers.  Students will present papers.

The course also features a large project.  Our research group will provide a transactional hardware simulation platform and a version of the Linux kernel that uses hardware transactional memory.  Project topics will include: transactionalizing OS subsystems, application programs,  or program runtime systems (like a garbage collector); designing hardware/software mechanisms for virtualizing transactions, and/or allowing transactions to persist across context switches; designing a transactional system call interface; designing a memory controller for hardware transactional memory.

Grading Policy

20-30% class participation and presentation
50-60% project
20% project presentation

These figures are approximate.

Other issues

Please read the department's code of conduct.