• Top
    • Documentation
    • Books
    • Recursion-and-induction
    • Boolean-reasoning
    • Projects
    • Debugging
    • Std
    • Proof-automation
    • Macro-libraries
    • ACL2
    • Interfacing-tools
    • Hardware-verification
      • Gl
      • Esim
        • Symbolic-test-vectors
          • Defstv
          • Stv-compile
          • Symbolic-test-vector-format
          • Stv-implementation-details
          • Compiled-stv-p
          • Stv-run-for-all-dontcares
          • Stv-run
          • Stv-process
          • Stv-run-check-dontcares
          • Symbolic-test-vector-composition
          • Stv-expand
          • Stv-easy-bindings
          • Stv-debug
          • Stv-run-squash-dontcares
          • Stvdata-p
          • Stv-doc
          • Stv2c
          • Stv-widen
            • Stv-widen-lines
          • Stv-out->width
          • Stv-in->width
          • Stv->outs
          • Stv-number-of-phases
          • Stv->ins
          • Stv-suffix-signals
          • Stv->vars
        • Esim-primitives
        • E-conversion
        • Esim-steps
        • Patterns
        • Mod-internal-paths
        • Defmodules
        • Esim-simplify-update-fns
        • Esim-tutorial
        • Esim-vl
      • Vl2014
      • Sv
      • Vwsim
      • Fgl
      • Vl
      • X86isa
      • Svl
      • Rtl
    • Software-verification
    • Testing-utilities
    • Math
  • Symbolic-test-vectors

Stv-widen

Widen the input/output/internals lines so that they all agree on how many phases there are.

Signature
(stv-widen stv) → widened-stv
Arguments
stv — Guard (stvdata-p stv).
Returns
widened-stv — Type (stvdata-p widened-stv), given the guard.

This is an STV preprocessing step which can be run before or after stv-expand. We generally expect that all the lines have been widened before any compilation is performed.

Definitions and Theorems

Function: stv-widen

(defun
 stv-widen (stv)
 (declare (xargs :guard (stvdata-p stv)))
 (let
  ((__function__ 'stv-widen))
  (declare (ignorable __function__))
  (b*
     (((stvdata stv) stv)
      (number-of-phases (stv-number-of-phases stv))
      (new-inputs (stv-widen-lines stv.inputs number-of-phases nil))
      (new-outputs (stv-widen-lines stv.outputs number-of-phases t))
      (new-internals
           (stv-widen-lines stv.internals number-of-phases t))
      (new-overrides
           (stv-widen-lines stv.overrides number-of-phases t)))
     (change-stvdata stv
                     :inputs new-inputs
                     :outputs new-outputs
                     :internals new-internals
                     :overrides new-overrides))))

Theorem: stvdata-p-of-stv-widen

(defthm stvdata-p-of-stv-widen
        (implies (and (stvdata-p stv))
                 (b* ((widened-stv (stv-widen stv)))
                     (stvdata-p widened-stv)))
        :rule-classes :rewrite)

Subtopics

Stv-widen-lines
Rewrite lines of an STV, repeating the last entry in each line to extend it to the desired number of phases.