Temporary form of the ports from parsing for ANSI modules. These
immediately get processed into the real ports by the port-resolve
transform and should be ignored thereafter.
List of parameter declarations that occur in the parameter port
list, rather than in the body of the module. These must be kept
separate in the ANSI case because the ports may refer to parameters,
and we therefore need to preserve the textual order so that shadowcheck
doesn't fail.
See make-implicit-wires. This is a temporary container to
hold the module elements, in program order, until the rest of the
design has been loaded. This field is "owned" by the make-implicit-wires
transform. You should never access it or modify it in any other
code.
