CS439: Principles of Computer Systems
Discussion Section 6 Problem Set Solutions
Due in Section on Friday, March 6, 2026
The problem set must be completed before section and brought to section. To
ensure that your problem set is turned in correctly and that you receive credit
for discussion section, you must follow these guidelines exactly.
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Draw a picture that shows how to translate a logical address into a
physical address in a single-level forward-mapped paging system that
includes a TLB.
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Assume you have a virtual memory system that uses paging. Is the
system vulnerable to internal and/or external fragmentation? Explain.
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Consider a two-level paging system with 128 pages and a page size
of 256 bytes. The system has 2048 bytes of physical memory and is
byte addressable. Assume the first-level page table holds 8
entries.
- How many bits are in a physical address?
- How many bits of the virtual address represent the
first-level page table?
- How many bits of the virtual address represent the second-level page table?
- How many bits are in the complete virtual address?
- What size are the page frames?
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Name two advantages of using small pages and two advantages of using large pages
in a paging mechanism. Why are page sizes growing in paging memory systems?
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Belady's anomaly: Intuitively, it seems that the more frames the
memory has, the fewer page faults a program will get.
Surprisingly enough, this is not always true. Belady (1969)
discovered an example in which FIFO page replacement causes more
faults with four page frames than with three. This strange
situation has become known as Belady's anomaly. To illustrate, a
program with five virtual pages numbered from 0 to 4 references
its pages in the order: 0 1 2 3 0 1 4 0 1 2 3 4
- Using FIFO replacement and assuming demand paging, compute
the number of page faults with 3 frames. Repeat for 4 frames.
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Compute the number of page faults under LRU, the clock
algorithm, and the optimal algorithm. What do you notice?
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Consider a program with seven virtual pages numbered from 0 to 6 references its
pages in the order:
0 1 3 6 2 4 5 2 5 0 3 1 2 5 4 1 0
Using clock page replacement algorithm with 4 frames and assuming demand paging,
compute the number of page faults and show the state of frames (pages in frames
and value of clock bit) after each page access.
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