The LC-1 ISA speicifes seven instructions. They are Call, Return, Add, Brn, Load, Store, and Stop. Three bits in the instruction, bits [15:13], are used to represent the opcode. The rest of the bits in the instruction, bits [12:0], may be used to represent a 13-bit address.
The addressing mode is direct. The memory space being simulated contains 213 locations, and the addressiblity is 16 bits. The LC-1 ISA has one condition register which is modified by two of the seven instructions: Add and Load. It is set when a negative value is stored into the accumulator, otherwise it is cleared.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 0 0 0 0 0 0 0 0 0 0 0 0 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 1 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 0 | 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 0 | 1 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 |
+ Sets the n condition register.
100 0 0001 0000 0010 ; Load from address 0 0001 0000 0010You can emulate this LC-1 instruction using the LC-3 LDR instruction. First, prepend 011 to the address specified in the LC-1 Load instruction. This produces the address 011 0 0001 0000 0010. Next, put this value into one of the LC-3 registers, for example, R2. The LC-3 instructions LDR R1, R2, #0 will perform the load, and the result will be stored into R1. Last R1 should be stored into the accumulator to complete the simulation of the LC-1 Load instruction.
The LC-1 simulator that you write must follow the following guidelines. The PC should be stored in memory location x4000. The accumulator should be stored in memory location x4001. Each time the PC or the accumulator changes during the simulation of the LC-1 program, memory location x4000 or x4001 should be updated to reflect this change. The n condition code register should be in x4002. Store the stack pointer at x4003.
The stack for the Call and Return instructions should begin at memory location x4010 (i.e. the stack pointer should be initialized to x400F). The stack grows downwards, i.e. to higher memory addresses.
You do not have to check for invalid instructions. You may assume that the LC-1 machine language program contains only valid instructions.
To begin writing the simulator start with the code template shown below. The majority of the work is performed in the subroutine DECODE. The main loop of the simulator calls FETCH and DECODE subroutines for each LC-1 instruction to simulate.
.ORIG x3000 ; initialization block ... ... ... ... ... ... ; fetch the instruction AGAIN JSR FETCH ; decode the instruction JSR DECODE BRnzp AGAIN ; subroutine to perform fetch FETCH ... ... ... ... ... ... RET ; subroutine to perform decode and ; the rest of the instruction cycle DECODE ... ... ... ... ... ... RET .END
.ORIG x6000 ; LC-1 program that starts at x6000 .FILL x8003 ; Load #10 into the accumulator .FILL x4004 ; Add #20 to the accumulator .FILL xC000 ; Stop the LC-1 simulator .FILL #10 ; .FILL #20 .ENDAfter loading the main simulator program you have written in LC-3 assembly language, you should load the LC-1 program. Doing so allows you to initialize memory with two programs.
The program that you will write will be called LC1Simulator.asm. Use the Style Guide to write your program.
Use the turnin program to submit your home work before 11 PM Thursday, 18 November 2004.