The base types for SystemVerilog enumerations.
This is a product type introduced by defprod.
The base type for an enumeration is given by the following SystemVerilog grammar rule:
enum_base_type ::= integer_atom_type [signing] | integer_vector_type [signing] [packed_dimension] | type_identifier [packed_dimension]
The main part of this (integer_atom_type, integer_vector_type, or type_identifier) is captured by the kind field.
The signedp field isn't sensible for
The optional dimension, if applicable. BOZO we don't currently support unsized dimensions.