Register index specified by the VEX.vvvv bits.
(vex-vvvv-reg-index vvvv) → index
The VEX.vvvv bits specify a register index in inverted (i.e. ones' complement) form: see Intel Manual Volume 2 Section 2.3.6 (Dec 2023). We introduce this function to perform the ones' complement, for greater abstraction.
Function:
(defun vex-vvvv-reg-index (vvvv) (declare (type (unsigned-byte 4) vvvv)) (let ((__function__ 'vex-vvvv-reg-index)) (declare (ignorable __function__)) (loghead 4 (lognot vvvv))))
Theorem:
(defthm natp-of-vex-vvvv-reg-index (b* ((index (vex-vvvv-reg-index vvvv))) (natp index)) :rule-classes :rewrite)
Theorem:
(defthm n04p-of-vex-vvvv-reg-index (unsigned-byte-p 4 (vex-vvvv-reg-index vvvv)) :rule-classes (:rewrite (:type-prescription :corollary (natp (vex-vvvv-reg-index vvvv)) :hints (("Goal" :in-theory '(unsigned-byte-p integer-range-p natp)))) (:linear :corollary (and (<= 0 (vex-vvvv-reg-index vvvv)) (< (vex-vvvv-reg-index vvvv) 16)) :hints (("Goal" :in-theory '(unsigned-byte-p integer-range-p (:e expt)))))))