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Fixtype of RISC-V feature choices for the base.
This is a tagged union type, introduced by fty::deftagsum.
For now we support RV32I [ISA:2], RV64I [ISA:4], RV32E [ISA:3], and RV64E [ISA:3]. Since RV128I [ISA:5] is still 'Draft' in the table in the Preface in [ISA], we do not have immediate plans to add that, unless the need arises.