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  • Vl-stmt

Vl-casestmt

Representation of case, casez, and casex statements.

This is a product type, introduced by deftagsum in support of vl-stmt.

Fields
test — vl-expr
The expression being tested.
caselist — vl-caselist
The match expressions and associated statements.
default — vl-stmt
The default statement, if provided. This is optional in the Verilog and SystemVerilog syntax. If it is omitted, our parser will put a null statement here.
loc — vl-location
casetype — vl-casetype-p
Basic case statement type: case, casez, or casex.
check — vl-casecheck-p
SystemVerilog violation checking specification: unique, unique0, priority, or none.
atts — vl-atts
Any (* foo, bar = 1*) style attributes associated with this statement.
casekey — vl-casekey-p
Extra keyword: :inside, :matches, or none

Case statements are discussed in the Verilog-2005 standard, Section 9.5 (page 127), and in the SystemVerilog-2012 standard in Section 12.5 (page 270).

We do not yet support some SystemVerilog extensions, in particular:

  • case ... matches ...
  • case ... inside ...

Subtopics

Make-vl-casestmt
Basic constructor macro for vl-casestmt structures.
Vl-casestmt->casetype
Get the casetype field from a vl-casestmt.
Vl-casestmt->caselist
Get the caselist field from a vl-casestmt.
Vl-casestmt->casekey
Get the casekey field from a vl-casestmt.
Vl-casestmt->test
Get the test field from a vl-casestmt.
Vl-casestmt->loc
Get the loc field from a vl-casestmt.
Vl-casestmt->default
Get the default field from a vl-casestmt.
Vl-casestmt->check
Get the check field from a vl-casestmt.
Vl-casestmt->atts
Get the atts field from a vl-casestmt.
Change-vl-casestmt
Modifying constructor for vl-casestmt structures.
Vl-casetype-p
Recognizes the possible kinds of case statements.
Vl-casecheck-p
Case statement violation checking mode.