Architecture: James Hoe/Carnegie Mellon University Fingerprinting: An Ingredient in Building Reliable Microprocessors ACES 2.402
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Type of Talk: Ar
chitecture
Speaker Name: James Hoe
Speaker Affiliation: Car
negie Mellon University
Date: Monday November 20 2005
Star
t Time: 3:30 p.m.
Location: ACES 2.402
Host: Derek Chiou
Talk Title: Fingerprinting: An Ingredient in Building Reliable Micro
processors
Talk Abstract:
Many aspects inherent to continued deep
-submicron scaling collude to impair the reliability of future microprocess
or implementations. This talk develops the idea of fingerprinting as an imp
ortant ingredient for efficient error detection. A fingerprint is a hashed
signature of internal state changes of a digital system. For example when a
pplied at the architectural level one may compute the fingerprint of the r
egister file and/or cache updates. For the purpose of detecting differences
in the mirrored operation of two processors comparing their fingerprints
for agreement is nearly as effective as the daunting alternative of compari
ng instantaneously all their internal states. We present two applications o
f fingerprinting. The first employs architectural fingerprinting to support
dual-modular-redundant execution in a multi-core processor. Fingerprinting
and other techniques combine to enable two mirrored cores to maintain redu
ndant execution and checking without requiring them to be microarchitectura
lly deterministic or to be in precise locked-step. The second work applies
microarchitectural-level fingerprinting to extremely-high-coverage detectio
n of transient failures in the datapath that would normally be masked and g
one unnoticed at the architectural level. This capability is central to our
approach to preemptively detect the on-set of transistor wear-out failures
. This talk presents joint work with Prof Babak Falsafi in the TRUSS projec
t (http://www.ece.cmu.edu/%7Etruss/) at the Computer Architecture Lab at Ca
rnegie Mellon (CALCM).
Speaker Bio:
James C. Hoe is an Associate
Professor of Electrical and Computer Engineering at Carnegie Mellon Univers
ity. His research interests include many aspects of computer architecture a
nd digital hardware design. His current research develops architecture and
microarchitecture solutions to improve computer reliability. His is also wo
rking on a hardware synthesis tool that compiles formal mathematical specif
ication of linear DSP transforms to hardware implementations. He received t
he B.S. degree in electrical engineering and computer science from Universi
ty of California at Berkeley in 1992 and the M.S. and Ph.D. degrees in elec
trical engineering and computer science from Massachusetts Institute of Tec
hnology in 1994 and 2000 respectively. For more information please visit
http://www.ece.cmu.edu/%7Ejhoe.
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