Architecture: Doug Carmean/Intel Future CPU Architectures: the Shift from Traditional Models in ACES 2.302
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me/Affiliation: Doug Carmean/Intel
Date/Time: October 10 2006 at 3
:30 - 5:00 p.m.
Location: ACES 2.302
Host: Derek Chiou
Talk Title: Future CPU Architectures: the Shift from Traditional Models
While Moore''s law is alive and well in silicon scal
it is clear that microprocessors have encountered signi
ficant technical issues that will influence the overall direction of the fu
ture architectures. This talk discusses the recent history of Intel microp
rocessors some of the rational that guided the development of those proces
sors. Further the talk highlights why the future microprocessor architectu
res will likely look different from the past.
The traditional microp
rocessor architecture uses hardware
techniques such as out-of-order pro
cessing to extract higher performance out of applications that have little
or no explicit parallelism. The hardware techniques employed in the past ha
ve continued to improve performance but at the cost of significantly
ncreasing the power consumption of the traditional microprocessors.
power increases have led to not only higher electrical power delivery cost
s but higher costs dissipating the power resulting in high ambient noise
larger enclosure and hotter laps. To avoid a future that requires asbestos
based jeans to properly handle laptops the microprocessor architecture mu
st change to facilitate higher performance without significantly higher pow
It is likely that microprocessor architecture will evolve
om the ubiquitous single core single threaded machine that we know and lov
e to an architecture that employs more cores and more threads. This shift
is apparent in today''s market where general purpose processors have includ
ed techniques such as Hyper-Threading Technology and Multi-Core processors.
This talk will speculate on some potential next steps for that technology
and some of the potential implications on software development.
Doug Carmean is a Principal Architect with Intel''s Desktop
Products Group in Oregon. Doug was one of the key architects responsible
for definition of the Intel Pentium 4 processor. He has been with Intel for
13 years working on IA-32 processors from the 80486 to the Intel Pentium
4 processor and beyond. Prior to
joining Intel Doug worked at ROSS Tec
hnology Sun Microsystems
Cypress Semiconductor and Lattice Semiconduc
tor. Doug enjoys fast
cars and scary Italian motorcycles.
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