Welcome to the Texas Systems Seminar series. This is a series of technical talks related to software systems and infrastructure by either companies or researchers based in Austin. The talks will be centered around the technical challenges the speaker is facing or solving (not a marketing talk). Speakers are usually senior technical folks, such as staff engineers. Coffee will be provided at the event.
We are grateful to AMD for sponsoring the Texas Systems Seminar.
The aim of this talk series is to bring together and connect the technical community in Austin, and to strengthen the connections between companies in Austin and the UT Computer Science department.
The talks will be open to the public, and will be attended by a mix of undergraduate, masters, and PhD students. A significant portion of the audience will be from the computer science department.
If you would like to know about new talks, please subscribe to the mailing list
texas-systems-seminar@utlists.utexas.edu.
You can subscribe here.
The talks are recorded and posted to our channel on Youtube.
Are you interested in presenting at this talk series? Please fill out this form. We will get in touch with you. Please note that this talk series is meant for speakers and companies based in Austin, and that the talk will be in person.
The talks will talk place at the Gates Dell Complex, the home of the UT Computer Science department. Please check the talk details to find the room for the talk.
The talks will be held on a monthly basis, usually on a Friday. Depending on the availability of speakers, we might have more than one talk in a given month. Check this space to know when the talks are finalized!
Guests can park at the San Jacinto parking garage. It is about a 10 minute walk to the department.
Speaker: Avani Wildani
Time: 11:00 am
Room: GDC 6.516
Abstract.
As LLMs and their support structures continue to grow as an interaction
paradigm for information access and management, it is imperative to revisit
tools that are optimized for yesterday's workloads. AI agents, scrapers, and
crawlers access CDNs in markedly different ways than humans do, necessitating
different cache assumptions and subsequent architectures. These architectures
themselves can be defined with AI assistance. In this talk, we will cover how
to redesign cache for our AI moment, and how we can use LLMs to speculate on
cache revalidation as well as select appropriate cache replacement algorithms
in real time with low overheads.
Speaker Bio.
Dr. Avani Wildani is a computer scientist who until recently led AI research efforts at Cloudflare. Avani is also the co-PI of the SimBioSys lab at Emory University, where she was previously a professor, and before that was a Pioneer Research Fellow at the Salk Institute. Avani has a Ph.D. from the University of California, an M.S. in Machine Learning from the University of New Mexico, and a B.S. from Harvey Mudd College. In her free time, Avani teaches lockpicking, gives talks about robots at Odd Salon, and writes science fiction
Speaker: Murat Isik
Time: 2:00 pm
Room: GDC 6.302
Abstract.
Most agentic coding systems rely on the assumption that a frontier model is always accessible via API. When code is classified, regulated, or must remain on-premises, this assumption fails and every design decision changes. This talk explores the engineering behind an agentic coding system that runs entirely on a single machine without network access. We orchestrate a set of open-weight models including a large orchestrator and specialized workers for planning, tool use, and code generation under a strict VRAM budget. These models operate against codebases far larger than their individual context windows. I will discuss the systems-level challenge of making agent execution deterministic and replayable for auditing purposes, a requirement that often conflicts with standard performance optimizations. Finally, I will share benchmark results comparing this local architecture against larger cloud-hosted models on legacy codebases like Ada, COBOL, and C. This talk demonstrates how the constraint of a disconnected, single-machine environment serves as a productive forcing function for superior systems design.
Speaker Bio.
Murat Can Isik is the co-founder and CEO of Noah Labs, a Stanford spin-out focused on deploying capable AI in restricted environments such as classified enclaves and disconnected field sites. A two-time founder with a background in machine-learning hardware research, he previously shipped silicon at Intel and Lattice Semiconductor. His work has been deployed at military field experimentation events, including JIFX and T-REX, and other classified deployments. Noah Labs serves defense primes, DoD innovation organizations, and regulated enterprises in banking and aviation. Murat holds an MS from Drexel University and conducted PhD research at Stanford and Purdue University.
Speaker: Guillaume Binet (Copper Robotics)
Time: 11:30 am
Room: GDC 6.516
Abstract.
Conventional operating systems manage compute resources, but they do not manage the semantics that determine whether a robot behaves correctly: data validity, physical time, execution provenance, causal ordering, external nondeterminism, and reproducibility. Copper moves some of these concerns into a static, recordable execution substrate. Robots are computers whose failures depend not only on code and machine state, but also on timing, sensors, hardware, and an external world that cannot easily be reproduced. Conventional operating systems provide processes, scheduling, and resource management, but do not capture the execution semantics needed to explain and replay a robot’s behavior.
This talk presents Copper, a Rust-based execution substrate for robotics built around statically defined task graphs, compile-time generation, predictable data movement, and unified recording of messages and timing. Copper is designed to turn a physical robot run into a reproducible computational artifact that can be inspected, replayed without the hardware, and reused as a regression test.
Using Copper as a concrete case study, I will examine what “deterministic replay” means for an embodied system, where nondeterminism enters, and which abstractions an operating system for robots may need beyond those provided by a conventional OS.
Speaker Bio.
Guillaume Binet has been fascinated by systems since he first tinkered with 68000 assembly on the Amiga. Over a 25-year career, that curiosity has taken him from maintaining the Python runtime for Google App Engine to building the onboard computing platforms behind autonomous cars and drones. He was VP of Onboard Infrastructure at Argo AI, VP of Core Platforms at Motional, and CTO at Skyways. Today, he is the founder of Copper Robotics and creator of Copper, an open-source execution substrate for deterministic and replayable robot software. He still enjoys taking systems apart, including old computers and pinball machines, and occasionally putting them back together.
Speaker: Shilpi Goel, AWS
Time: 2 pm
Room: GDC 6.516
Abstract.
How do we know that tools used to analyze code are themselves correct? These tools are complex, making them difficult to trust. Strata is AWS's open-source platform for building code reasoning tools on verified foundations. Strata provides a family of intermediate languages expressive enough to capture programming constructs across many mainstream languages, including Java and Python. Strata targets tool developers implementing techniques such as deductive verification, static analysis, model checking, and fuzzing. It enables these developers to implement analyses and language frontends independently and combine them freely, achieving broader analysis coverage through a portfolio of techniques. Formalized in Lean yet accessible via APIs to mainstream languages, it enables verified analyses without requiring expertise in Lean.
Strata tackles three practical challenges facing code reasoning tool builders today. First, most analysis toolchains rest on unverified foundations -- many lacking formal semantics entirely. Strata provides formal semantics for its intermediate languages, along with machine-checked proofs that its transformations behave as specified, creating an explicit trusted computing base. Second, analysis tools are often siloed: implementations developed for one language rarely transfer to another, which means every new language requires building a toolchain from scratch. Strata's intermediate languages, organized at different levels of abstraction, allow diverse analyses to share a common foundation. Finally, Strata's domain-specific framework automatically generates the language infrastructure -- dialect definitions, parsers, (de)serializers -- for new languages, lowering the cost of bringing them into the ecosystem.
Strata is open-source, very much in active development, and underpins a key pillar of CSLib, an effort to formalize computer science in Lean. This talk will give an overview of the Strata platform, its capabilities, and opportunities for contributing to Strata and its ecosystem.
Speaker Bio.
Shilpi Goel is a Senior Applied Scientist in the Agentic Automated Reasoning Group at Amazon Web Services. Previously, she was a Formal Verification Engineer at Intel Corporation and before that, at Centaur Technology. She graduated from The University of Texas at Austin with her Ph.D. in Computer Science, advised by Warren A. Hunt, Jr. For her dissertation, she developed tools and techniques to enable formal analysis of x86 machine-code programs using the ACL2 theorem proving system.
Speaker: Sudhanva Gurumurthi, AMD
Time: 2 pm
Room: GDC 6.516
Abstract.
Computing must be reliable. From a computer architecture perspective, achieving this goal begins with understanding the root causes of faults and applying systematic, quantitative methods to improve the resilience of hardware components. This talk will illustrate this approach through two case studies. The first describes research that led to a new resilience architecture for die-stacked DRAM that was adopted into the third generation of the JEDEC High-Bandwidth Memory standard (HBM3) and incorporated in GPUs and AI accelerators deployed at scale today in data centers. The second focuses on techniques for designing and testing high-performance CPUs to improve resilience to faults arising from silicon defects. Together, these examples highlight how principled reliability research can translate into practical impact.
Speaker Bio.
Sudhanva Gurumurthi is a Fellow at AMD, where he is responsible for research and advanced development in Reliability, Availability, and Serviceability (RAS). His work has impacted numerous AMD products, multiple industry standards, and external research in the field. Before joining industry, he was an Associate Professor with tenure in the Computer Science Department at the University of Virginia. Sudhanva is the recipient of an NSF CAREER Award, a Google Focused Research Award, and is named to the ISCA Hall of Fame. He currently serves as the Editor-in-Chief of IEEE Computer Architecture Letters. Sudhanva received his PhD in Computer Science and Engineering from Penn State in 2005.
Speaker: John Groves, Technical Director, Micron
Time: 2 pm
Room: GDC 6.516
Abstract.
The Compute Express Link (CXL) standard enables disaggregated memory, both for composable capacity-on-demand and memory shared by multiple servers. Now DRAM capacity can be provisioned within a rack or cluster via a fabric manager, either private or shared. This has led to interesting work in memory tiering, as well as memory sharing. Adding memory for non-shared use is straightforward – it is brought online as if hot-plugged – but disaggregated shared memory requires some new abstractions. One such abstraction is the Fabric-Attached Memory File System (famfs). Famfs is open source software that organizes shared memory as a file system; reading or writing a famfs file are just ‘memcpy()’, and a memory-mapped famfs file is byte addressable and accessed at cache line granularity – just like conventional DRAM.
Brief outline
* Brief introduction to CXL
* Overview of disaggregated memory topologies
* Comments on cache coherency
* Introduction to the Fabric-Attached Memory File System (famfs) and shared memory
use cases
Speaker Bio.
John Groves has been a kernel and system software developer for decades, working on
memory management, file systems and data storage in several Unix variants prior to
Linux. John serves the CXL Consortium as co-chair of the Software and Systems
Working Group (SSWG), and is a contributor to the CXL specification - particularly in the
areas of fabric management and sharable memory devices. John is also the creator and
primary author of famfs, which is progressing toward inclusion the Linux kernel. John
has spoken on famfs at the last three Linux Plumbers Conferences (2023-2025) as well
as the Linux Storage, Filesystem and Memory Management (LSFMM) summits in 2024
and 2025 , Usenix FAST in 2025 (famfs poster), the SNIA Developers Conference
(2025) and the Massive Storage Systems Technology (MSST) conference in 2025. John
received a BS degree in Physics in 1985 from Northern Illinois University.
John Groves has been a kernel and system software developer for decades, working on
memory management, file systems and data storage in several Unix variants prior to
Linux. John serves the CXL Consortium as co-chair of the Software and Systems
Working Group (SSWG), and is a contributor to the CXL specification - particularly in the
areas of fabric management and sharable memory devices. John is also the creator and
primary author of famfs, which is progressing toward inclusion the Linux kernel. John
has spoken on famfs at the last three Linux Plumbers Conferences (2023-2025) as well
as the Linux Storage, Filesystem and Memory Management (LSFMM) summits in 2024
and 2025 , Usenix FAST in 2025 (famfs poster), the SNIA Developers Conference
(2025) and the Massive Storage Systems Technology (MSST) conference in 2025. John
received a BS degree in Physics in 1985 from Northern Illinois University.
Speaker: Conor Cunningham, Microsoft
Time: 2 pm
Room: GDC 6.302
Abstract.
While most students learn sorting algorithms in introductory computer science classes, many of these algorithms were created decades ago before the evolution of CPUs into multi-core, multi-level cache systems with super-scalar execution pipelines including complex branch prediction and memory prefetching implementations to hide latency. While traditional Big-O analysis can identify algorithms that will perform sorting faster or slower at a logical level, there is a different set of considerations and challenges when trying to get algorithms to perform optimally in practice on a current server CPU. We created MegaSort, an AVX-512-based quicksort/bitonic sort based on the Brahmas quicksort, as an intellectual exercise to validate next-generation chips from processor vendors with a focus on measuring and understanding the microarchitectural details of each vendor’s SIMD implementation so we can plan future work in Microsoft’s database engines. It can sort 1 billion signed 64-bit integers in under 30 seconds and can often go far faster than that (depending on data distribution). This talk covers how to build a sort to run on modern hardware, the challenges that must be overcome in dealing with current-generation microarchitecture behaviors, and the tools (ex: Vtune, uProf) that modern processor vendors make available so that anyone can do evaluations of any implementation where performance is a goal.
Speaker Bio.
Conor completed his B.S. in Computer Science from UT Austin in 1996. Later, he completed a Masters degree, also in Computer Science, at the University of Washington in Seattle. He has worked at Microsoft for 27 years building database engines with specializations in query optimization/search algorithms, distributed systems, and more recently low-level query performance on modern hardware. He has led large scale projects such as the releases of SQL Server 2016, 2017, and 2019, and now he has been working on the analytics engine inside of SQL’s engine which is used in SQL Server, Azure SQL Database, and in Fabric Data Warehouse (a scale-out analytics engine).
Speaker: David B. Shabat, Vice President - Research and Development, Quali
Time: 2 pm
Room: GDC 6.302
Abstract.
Modern intelligent agent systems rely on efficient, robust coordination to handle complex, asynchronous interactions and long-running processes. Traditional synchronous communication methods and centralized databases often create bottlenecks and points of failure, hindering system scalability and agent communication quality.
This overview introduces a system architecture that leverages the Actor Model and the Saga design pattern to build highly resilient, high-throughput agent-to-agent communication platforms. We address the challenges of managing state and ensuring data consistency across multiple, independent services during extended operations (e.g., multi-step negotiations, task handoffs). The Actor Model serves as the foundational computational paradigm, providing isolated, concurrent units of behavior and state that communicate exclusively via asynchronous message passing. This inherently distributed approach eliminates shared memory conflicts and enables massive parallelization of agent interactions.
To manage the complexity of distributed transactions within this model, we implement the Saga pattern. A saga is modeled as a sequence of local transactions, coordinated by a dedicated “orchestrator” actor. This orchestrator manages the global state of the long-running process and utilizes compensating transactions to ensure eventual consistency and robust failure recovery without requiring cumbersome two-phase commits.
This session will provide an industry-oriented abstract view of:
The Actor Model in practice: How asynchronous messaging and actor isolation improve communication efficiency and system responsiveness.
Saga implementation: Using orchestrator actors to define and manage complex, multi-agent workflows.
Resilience and state management: Techniques for persisting actor state to survive failures and guarantee process completion.
Speaker Bio.
David B. Shabat is the Vice President - Research and Development at Quali. He has several decades of experience in industry across companies such as Intel, Sisense, BitDam, and Quali. He got his Bachelors and Masters degree from Reichman University.