TRIPS, Scaling to the Edge of Silicon

TRIPS Software and Tools

The TRIPS software development environment consists of tools familiar to most programmers. Where possible, tools have been adapted from the open source community and ported to the TRIPS ISA and environment. The tools developed are listed below, but they are no longer being supported or distributed.


The TRIPS toolchain includes several simulators at different levels of abstraction. These include the following:

  • tsim_arch: a fast instruction emulator useful for compiler development and code debugging.
  • tsim_proc: a detailed microarchitecture simulator that is validated to within a few percent of the RTL hardware design.
  • tsim_sys: a fast simulator that models a multiprocessor constructed of multiple TRIPS chips.
  • tsim_cyc: a TRIPS multiprocessor simulator that provides performance estimates to within 25%.
  • Compiler

    The TRIPS compiler is based on the SCALE research compiler developed by Kathryn McKinley's team at the University of Massachusetts. This compiler accepts C and Fortran programs and performs extensive scalar optimizations. The TRIPS specific optimizations generate large regions of atomically executable code (hyperblocks) using techniques such as loop unrolling, inlining, and predication. In addition, the back-end of the compiler includes a spatial instruction placer, which determines where each instruction will execute on the grid of execution units.

    Binary utilities

    TRIPS employs the ELF binary format which includes a simple port of binary tools such as nm, objdump, readelf, strip, and others. In addition, the TRIPS toolchain includes an assembler, linker, and loader.


    The toolchain includes a port of the gnu debugger (gdb) that works with TRIPS simulators and hardware.

    Performance analysis

    The toolchain includes numerous custom performance analysis tools that help pinpoint bottlenecks and enable optimization of code. One novel tool analyzes the critical path of an executing program and determines which TRIPS hardware resources are the bottlenecks. The TRIPS system also includes hardware performance counters and software utilities to read and sample them.


    The TRIPS toolchain includes standard C and Fortran runtime libraries as well as parallel libraries for MPI and for a streaming virtual machine.


    The University of Texas at Austin, Dept. of Computer Sciences