I'm a doctoral student in the Department of Computer Science at The University of Texas at Austin. I've been here since Fall 2019, but I've spent nearly all of that time away on parenting leave during the Covid-19 pandemic. I'm happy to have finally returned to UT in Fall 2022.

I do research in computer architecture and computer systems in the Speedway Group, advised by Dr. Calvin Lin.

Research Interests

Broadly, I'm interested in instruction set architecture (ISA) design for modern systems and exploring problems that sit at the intersection of hardware and software.

I'm particularly interested in understanding how changes to the ISA impact our ability to respond to the performance, programmability, and security challenges arising across the computing landscape. In my research, I want to re-examine longstanding ISA design principles in light of modern microarchitectural strengths, enabling future ISAs to provide a richer, more flexible interface that leverages hardware optimization and delivers programmability to emerging domains.

I'm also interested in computer science education, particularly in pedagogical and curricular practices to connect more diverse students to computer science and engineering. Moreover, I'm a non-traditional graduate student, and I'm interested in academic practices that support those returning to academia after parenting and other career pauses.


I have a B.S. in electrical and computer engineering and engineering and public policy from Carnegie Mellon University and an M.S. in computer science from Texas State University.

I've also been a senior design engineer at ARM Austin (where I designed the unit-level verification environment for the load/store unit and L1 data cache of an out-of-order, cache coherent multicore processor) and a lecturer in both the Department of Computer Science and the Ingram School of Engineering at Texas State University (where I taught computer architecture, digital logic, and CS 2).

As a masters student, I was a research assistant in Dr. Martin Burtscher's Efficient Computing Laboratory (ECL), where I worked on techniques to efficiently accelerate irregular codes on GPUs. I was fortunate to have my M.S. work supported by a 2011 NSF Graduate Research Fellowship.