Calvin Lin
    Professor of Computer Science
    University of Texas, Austin
 
   
 
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I do research in compilers and computer architecture, with interests in security. I have written a textbook with Larry Snyder called Principles of Parallel Programming. (Errata for the first printing.)  
More recently, Akanksha Jain and I have written a book, Cache Replacement Policies, which is part of Morgan & Claypool's Synthesis Lectures on Computer Architecture.  


Select Publications
  Efficient Meta-Data Management for Irregular Data Prefetching
with H. Wu, K. Nathella, D. Sunwoo, and A. Jain
46th International Symposium on Computer Architecture (ISCA), 2019.

Fast Fine-Grained Global Synchronization on GPUs
with K. Wang and D. Fussell
24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2019, pp. 793-806.

Rethinking Belady's Algorithm to Accommodate Prefetching
with A. Jain
45th International Symposium on Computer Architecture (ISCA), 2018, pp. 110-123.

Static Detection of Asymptotic Resource Side-Channel Vulnerabilities in Web Application
with J. Chen, O. Olivo, and I. Dillig
Int'l Conference Automated Software Engineering (ASE) 2017, pp. 229-239.

Hawkeye: Leveraging Belady's Algorithm for Improved Cache Replacement
with A. Jain
2nd Cache Replacement Competition, 2017.
(First Place Finisher)

Decoupled Affine Computation for SIMT GPUs
with K. Wang
44th International Symposium on Computer Architecture (ISCA), 2017, pp. 295--306.

Secure, Precise, and Fast Floating-Point Operations on x86 Processors
with A. Rane and M. Tiwari
25th USENIX Security Symposium (USENIX Security) 2016, pp. 71-86.

Back to the Future: Leveraging Belady's Algorithm for Improved Cache Replacement
with A. Jain
43th International Symposium on Computer Architecture (ISCA), 2016, pp. 78-89.
(Micro Top Picks Honorable Mention)

Raccoon: Closing Digital Side-Channels through Obfuscated Execution
with A. Rane and M. Tiwari
USENIX Security Symposium, 2015, pp. 431-446.

Linearizing Irregular Memory Accesses for Improved Correlated Prefetching
with A. Jain
46th International Symposium on Microarchitecture (Micro), 2013, pp. 247-259.
(Finalist, Best Paper Award)

Dynamic Scheduling for Large-Scale Distributed-Memory Ray Tracing
with P. Navratil, H. Childs, and D. Fussell
Eurographics Symposium on Parallel Graphics and Visualization, 2012.
(Best Paper Award)

Flow-Sensitive Pointer Analysis for Millions of Lines of Code
with B. Hardekopf
International Symposium on Code Generation and Optimization (CGO), 2011, pp. 289--298.
(Best Paper Award)

The Ant and the Grasshopper: Fast and Accurate Pointer Analysis for Millions of Lines of Code
with Ben Hardekopf
ACM Conference on Programming Language Design and Implementation (PLDI), June, 2007, pp. 290-299.
(Best Paper Award)

Adaptive History-Based Memory Schedulers
with Ibrahim Hur
37th International Symposium on Microarchitecture (Micro), December, 2004, pp. 343-354.
(Best Paper Award)

Dynamic Branch Prediction with Perceptrons
with D. Jiménez
Proceedings of the 7th Int'l Symposium on High Performance Computer Architecture (HPCA), January, 2001. pp. 197-206.
(2019 HPCA Test of Time Winner)

 

The most important thing you can do
is what you're doing when you're doing it.
When you study, study,
and when you play, play.

                    - Pete Carril



  Email:
lin(at)cs.utexas.edu

Office:
GDC 5.512
(512) 471-9560
(512) 471-8885 (Fax)

Office Hours:
Mon 3:30-4:15
Wed 3:30-4:15
 


  Last updated: June 19, 2019