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Primary Publications
TRIPS Overview
- "Scaling to the End of
Silicon with EDGE Architectures," D. Burger, S.W. Keckler, K.S. McKinley, et al. IEEE Computer, 37 (7), pp. 44-55, July, 2004.
TRIPS Processor Architecture
- "The Distributed Microarchitecture of the TRIPS Prototype Processor," K. Sankaralingam, R. Nagarajan, P. Gratz, R. Desikan, D. Gulati, H. Hanson, C. Kim, H. Liu, N. Ranganathan, S. Sethumadhavan, S. Sharif, P. Shivakumar, W. Yoder, R. McDonald, S.W. Keckler, and D.C. Burger, 39th International Symposium on Microarchitecture (MICRO), December, 2006.
- "Dataflow Predication," A. Smith, R. McDonald, R. Nagarajan, K. Sankaralingam, D.C. Burger, K.S. McKinley, and S.W. Keckler, 39th International Symposium on Microarchitecture (MICRO), December, 2006.
- "Exploiting ILP, TLP, and DLP Using Polymorphism in the TRIPS Architecture,"
K. Sankaralingam, R. Nagarajan, H. Liu, J. Huh, C.K. Kim D. Burger, S.W. Keckler,
and C.R. Moore. 30th Annual International Symposium on Computer Architecture
(ISCA), pp. 422-433, June 2003.
- "A Wire-Delay Scalable Microprocessor Architecture for High Performance
Systems," S.W. Keckler, Doug Burger, C.R. Moore, R. Nagarajan, K. Sankaralingam,
V. Agarwal, M.S. Hrishikesh, N. Ranganathan, and P. Shivakumar. International
Solid-State Circuits Conference (ISSCC), pp. 1068-1069, February, 2003.
- "A Design Space Evaluation of Grid Processor Architectures," R. Nagarajan,
K. Sankaralingam, D. Burger, and S.W. Keckler. 34th Annual International
Symposium on Microarchitecture (MICRO), pp. 40-51, December, 2001.
- "Routed Inter-ALU Networks for ILP Scalability and Performance," K. Sankaralingam,
V.A. Singh, S.W. Keckler, and D. Burger, International Conference on Computer
Design (ICCD), October, 2003.
TRIPS Compiler
- "Head and Tail Duplication for Convergent Hyperblock Formation," B. Maher, A. Smith, D.C. Burger, and K.S. McKinley. 39th International Symposium on Microarchitecture (MICRO), December, 2006.
- "A Spatial Path Scheduling Algorithm for EDGE Architectures," K. Coons, X. Chen, S.K. Kushwaha, D.C. Burger, and K.S. McKinley. The Twelfth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October, 2006.
- "Compiling for EDGE Architectures," A. Smith, J. Burrill, J. Gibson, B. Maher, N. Nethercote, B. Yoder, D.C. Burger, and K.S. McKinley. 2006 International Conference on Code Generation and Optimization (CGO), March, 2006.
- "Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures," R. Nagarajan, S. Kushwa, D. Burger, K.S. McKinley, C. Lin, and S.W. Keckler. 2004 International Conference on Parallel Architectures and Compilation Techniques (PACT), September, 2004.
TRIPS Memory Systems
- "Implementation and Evaluation of On-Chip Network Architectures," P. Gratz, C. Kim, R. McDonald, S.W. Keckler, and D.C. Burger. 2006 International Conference
on Computer Design (ICCD), October, 2006.
- "Design and Implementation of the TRIPS Primary Memory System," S. Sethumadhavan, R. Desikan, R. McDonald, D.C. Burger, and S.W. Keckler. 2006 International Conference
on Computer Design (ICCD), October, 2006.
- "An Adaptive, Non-Uniform Cache Structure for Wire-Delay Dominated On-Chip
Caches," C. Kim, D. Burger, and S.W. Keckler. 10th International Conference
on Architectural Support for Programming Languages and Operating Systems (ASPLOS),
pp. 211-222, October, 2002.
Technology Analyses
- "The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays,"
M.S. Hrishikesh, N.P. Jouppi, K.I. Farkas, D. Burger, S.W. Keckler, and P.
Shivakumar. 29th International Symposium on Computer Architecture (ISCA),
pp. 14-24, May, 2002.
- "Clock Rate Versus IPC: The End of the Road for Conventional Microarchitectures,"
V. Agarwal, M.S. Hrishikesh, S.W. Keckler, and D. Burger. 27th International
Symposium on Computer Architecture (ISCA), June, 2000.
TRIPS Design Documents
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- "TRIPS Processor Reference Manual," D. Burger,
S.W. Keckler, K. Sankaralingam, and R. Nagarajan, Department of
Computer Sciences, The University of Texas at Austin, TR-05-19,
2005.
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- "TRIPS Intermediate Language (TIL) Manual,"
A. Smith, J. Gibson, J. Burrill, K. Coons, R. McDonald, D. Burger,
S.W. Keckler, and K.S. McKinley, Department of
Computer Sciences, The University of Texas at Austin, TR-05-20,
2005.
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- "TRIPS Assembly Language (TASL) Manual," B. Yoder,
J. Gibson, J. Burrill,
R. McDonald, D. Burger,
S.W. Keckler, K. Sankaralingam, and R. Nagarajan, Department of
Computer Sciences, The University of Texas at Austin, TR-05-21,
2005.
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- "TRIPS Application Binary Interfaced (ABI) Manual,"
A. Smith, J. Burrill, R. McDonald, N. Nethercote, B. Yoder, D. Burger,
S.W. Keckler, and K.S. McKinley Department of
Computer Sciences, The University of Texas at Austin, TR-05-22,
Version A.06, 2006.
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