Professor, Department of Electrical and Computer Engineering
Vijay Garg is a Cullen Trust Endowed Professor in the Department of Electrical & Computer Engineering and Department of Computer Sciences at The University of Texas at Austin. He is an IEEE Fellow and is the director of the Parallel and Distributed Systems laboratory at UT Austin. His research contributions are in the areas of distributed algorithms, global predicate detection, distributed debugging and simulation, fault-tolerance, lattice theory and supervisory control of discrete event systems. His research has been supported by NSF, IBM, Texas Advanced Research Program, TRW, SRC, and Compaq among others..
Research Labs & Affiliations:
Parallel and Distributed Systems Laboratory
Xiong Zheng, Vijay Garg. January 19, 2019. An Optimal Vector Clock Algorithm for Multithreaded Systems.
Vijay K Garg, Rohan Garg. January 4, 2019. Parallel algorithms for predicate detection.
Vijay K Garg. December 26, 2018. Applying Predicate Detection to the Constrained Optimization Problems.
Xiong Zheng, Vijay K Garg, John Kaippallimalil. October 13, 2018. Linearizable Replicated State Machines with Lattice Agreement.
Xiong Zheng, Changyong Hu, Vijay K Garg. July 30, 2018. Lattice Agreement in Message Passing Systems.
Awards & Honors
Invited Distinguished Panelist, Data Intensive Distributed Computing
UT Outstanding Inventor
Best Paper Award, 12th International Symposium on Stabilization, Safety, and Security of Distributed Systems
Invited Distinguished Panelist, Workshop on Digital Preservation
Invited Panelist, 8th International Symposium on Stabilization, Safety, and Security of Distributed Systems
Dean’s Fellowship, The University of Texas at Austin
Faculty Research Award, The University of Texas at Austin
Vijay K Garg
Cullen Trust for Higher Education Endowed Professorship in Engineering #5